The ARM EH experiment worked!

Place the LSDA into the TEXT section for ARM platforms. This involves making the
encoding indirect, pcrel, and sdata4 instead of an absolute pointer. The
references to the type infos are then non-lazy pointers. Revision 98019 changed
the encoding of non-lazy pointers to add the symbol to the non-lazy pointer
definition if it's a local symbol (otherwise, it's external and set to '0' so
that the loader can adjust it to the real value). This paved the way for this
change to work on ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98068 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 78 insertions, 50 deletions

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 12f1839a03..3dd0313f4b 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -40,17 +40,11 @@
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/ADT/VectorExtras.h"
-#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Dwarf.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 #include <sstream>
 using namespace llvm;
-using namespace dwarf;
-
-static cl::opt<bool> EnableARMEHTest("enable-arm-eh-test", cl::Hidden,
-    cl::desc("Enable ARM EH Test"));
 
 static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, EVT &ValVT, EVT &LocVT,
                                    CCValAssign::LocInfo &LocInfo,
@@ -134,32 +128,9 @@ void ARMTargetLowering::addQRTypeForNEON(EVT VT) {
   addTypeForNEON(VT, MVT::v2f64, MVT::v4i32);
 }
 
-namespace llvm {
-
-  // FIXME: This is a test of <rdar://problem/6804645>.
-  class ARMMachOTargetObjectFile : public TargetLoweringObjectFileMachO {
-  public:
-    virtual void Initialize(MCContext &Ctx, const TargetMachine &TM) {
-      TargetLoweringObjectFileMachO::Initialize(Ctx, TM);
-
-      // Exception Handling.
-      LSDASection = getMachOSection("__TEXT", "__gcc_except_tab", 0,
-                                    SectionKind::getReadOnlyWithRel());
-    }
-
-    virtual unsigned getTTypeEncoding() const {
-      return DW_EH_PE_indirect | DW_EH_PE_pcrel | DW_EH_PE_sdata4;
-    }
-  };
-
-}
-
 static TargetLoweringObjectFile *createTLOF(TargetMachine &TM) {
   if (TM.getSubtarget<ARMSubtarget>().isTargetDarwin())
-    if (EnableARMEHTest)
-      return new ARMMachOTargetObjectFile();
-    else
-      return new TargetLoweringObjectFileMachO();
+    return new ARMMachOTargetObjectFile();
 
   return new ARMElfTargetObjectFile();
 }
diff --git a/lib/Target/ARM/ARMTargetObjectFile.cpp b/lib/Target/ARM/ARMTargetObjectFile.cpp
new file mode 100644
index 0000000000..7463e309a8
--- /dev/null
+++ b/lib/Target/ARM/ARMTargetObjectFile.cpp
@@ -0,0 +1,54 @@
+//===-- llvm/Target/ARMTargetObjectFile.cpp - ARM Object Info Impl --------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "ARMTargetObjectFile.h"
+#include "ARMSubtarget.h"
+#include "llvm/MC/MCSectionELF.h"
+#include "llvm/MC/MCSectionMachO.h"
+#include "llvm/Support/Dwarf.h"
+#include "llvm/Target/TargetMachine.h"
+using namespace llvm;
+using namespace dwarf;
+
+//===----------------------------------------------------------------------===//
+//                               ELF Target
+//===----------------------------------------------------------------------===//
+
+void ARMElfTargetObjectFile::Initialize(MCContext &Ctx,
+                                        const TargetMachine &TM) {
+  TargetLoweringObjectFileELF::Initialize(Ctx, TM);
+
+  if (TM.getSubtarget<ARMSubtarget>().isAAPCS_ABI()) {
+    StaticCtorSection =
+      getELFSection(".init_array", MCSectionELF::SHT_INIT_ARRAY,
+                    MCSectionELF::SHF_WRITE | MCSectionELF::SHF_ALLOC,
+                    SectionKind::getDataRel());
+    StaticDtorSection =
+      getELFSection(".fini_array", MCSectionELF::SHT_FINI_ARRAY,
+                    MCSectionELF::SHF_WRITE | MCSectionELF::SHF_ALLOC,
+                    SectionKind::getDataRel());
+  }
+}
+
+//===----------------------------------------------------------------------===//
+//                              Mach-O Target
+//===----------------------------------------------------------------------===//
+
+void ARMMachOTargetObjectFile::Initialize(MCContext &Ctx,
+                                          const TargetMachine &TM) {
+  TargetLoweringObjectFileMachO::Initialize(Ctx, TM);
+
+  // Exception Handling.
+  LSDASection = getMachOSection("__TEXT", "__gcc_except_tab", 0,
+                                SectionKind::getReadOnlyWithRel());
+}
+
+unsigned ARMMachOTargetObjectFile::getTTypeEncoding() const {
+  return DW_EH_PE_indirect | DW_EH_PE_pcrel | DW_EH_PE_sdata4;
+}
diff --git a/lib/Target/ARM/ARMTargetObjectFile.h b/lib/Target/ARM/ARMTargetObjectFile.h
index a488c0a21f..481d7abd31 100644
--- a/lib/Target/ARM/ARMTargetObjectFile.h
+++ b/lib/Target/ARM/ARMTargetObjectFile.h
@@ -11,29 +11,31 @@
 #define LLVM_TARGET_ARM_TARGETOBJECTFILE_H
 
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
-#include "llvm/MC/MCSectionELF.h"
 
 namespace llvm {
 
-  class ARMElfTargetObjectFile : public TargetLoweringObjectFileELF {
-  public:
-    ARMElfTargetObjectFile() : TargetLoweringObjectFileELF() {}
-
-    void Initialize(MCContext &Ctx, const TargetMachine &TM) {
-      TargetLoweringObjectFileELF::Initialize(Ctx, TM);
-
-      if (TM.getSubtarget<ARMSubtarget>().isAAPCS_ABI()) {
-        StaticCtorSection =
-          getELFSection(".init_array", MCSectionELF::SHT_INIT_ARRAY,
-                        MCSectionELF::SHF_WRITE | MCSectionELF::SHF_ALLOC,
-                        SectionKind::getDataRel());
-        StaticDtorSection =
-          getELFSection(".fini_array", MCSectionELF::SHT_FINI_ARRAY,
-                        MCSectionELF::SHF_WRITE | MCSectionELF::SHF_ALLOC,
-                        SectionKind::getDataRel());
-      }
-    }
-  };
+class MCContext;
+class TargetMachine;
+
+class ARMElfTargetObjectFile : public TargetLoweringObjectFileELF {
+public:
+  ARMElfTargetObjectFile() : TargetLoweringObjectFileELF() {}
+
+  virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
+};
+
+// FIXME: This subclass isn't 100% necessary. It will become obsolete once we
+//        can place all LSDAs into the TEXT section. See
+//        <rdar://problem/6804645>.
+class ARMMachOTargetObjectFile : public TargetLoweringObjectFileMachO {
+public:
+  ARMMachOTargetObjectFile() : TargetLoweringObjectFileMachO() {}
+
+  virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
+
+  virtual unsigned getTTypeEncoding() const;
+};
+
 } // end namespace llvm
 
 #endif
diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt
index 964551f911..bbc0095f6a 100644
--- a/lib/Target/ARM/CMakeLists.txt
+++ b/lib/Target/ARM/CMakeLists.txt
@@ -27,6 +27,7 @@ add_llvm_target(ARMCodeGen
   ARMRegisterInfo.cpp
   ARMSubtarget.cpp
   ARMTargetMachine.cpp
+  ARMTargetObjectFile.cpp
   NEONMoveFix.cpp
   NEONPreAllocPass.cpp
   Thumb1InstrInfo.cpp