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| author | Chris Lattner <sabre@nondot.org> | 2006-03-20 18:26:51 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-03-20 18:26:51 +0000 |
| commit | bd83afd3cdaa89b8a378e92518a5aec7dc7f46c5 (patch) | |
| tree | 210e90c051b21807e1549dfcffd14cc0a6ba33fe | |
| parent | f255b810053df0a3379c795156aa03c23442b99f (diff) | |
Fix a couple of bugs in permute/splat generate, thanks to Nate for actually
figuring these out! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26904 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 2 |
2 files changed, 1 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index ee41ed13b4..a50664d1ba 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -599,8 +599,6 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { // Store the input value into Value#0 of the stack slot. unsigned InSize = MVT::getSizeInBits(Op.getOperand(0).getValueType())/8; - FIdx = DAG.getNode(ISD::ADD, MVT::i32, FIdx, - DAG.getConstant(16-InSize, MVT::i32)); SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(), Op.getOperand(0), FIdx,DAG.getSrcValue(NULL)); return DAG.getNode(PPCISD::LVE_X, Op.getValueType(), Store, FIdx, diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 8af3e87723..0eee148876 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -961,7 +961,7 @@ def VNMSUBFP: VAForm_1<47, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC), Requires<[FPContractions]>; def VPERM : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC), - "vperm $vD, $vA, $vC, $vB", VecPerm, + "vperm $vD, $vA, $vB, $vC", VecPerm, [(set VRRC:$vD, (PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, VRRC:$vC))]>; |