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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-29 17:33:29 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-29 17:33:29 +0000 |
| commit | bd4562e1638ea6dae205525b0ed84955b9a004af (patch) | |
| tree | 7694978d1be5557505f1856422b50dc202af422e | |
| parent | d217da1131388680ec73794ecd5d6fcf3766c114 (diff) | |
Tweak comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136468 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 1a23651d8d..a6ff53d890 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1305,7 +1305,7 @@ def BKPT : AI<(outs), (ins imm0_65535:$val), MiscFrm, NoItinerary, // framework to represent optional operands, change this behavior. class CPS<dag iops, string asm_ops> : AXI<(outs), iops, MiscFrm, NoItinerary, !strconcat("cps", asm_ops), - [/* For disassembly only; pattern left blank */]>, Requires<[IsARM]> { + []>, Requires<[IsARM]> { bits<2> imod; bits<3> iflags; bits<5> mode; |