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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-09-03 13:19:16 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-09-03 13:19:16 +0000 |
| commit | bc4cec9a62113dc7d12caa03f1a1e8a31ce60b9c (patch) | |
| tree | 2aa323a8214ce2fedd35240bac213a5027a8c18a | |
| parent | 6b128bdc58a496e9f08e4d09416330320761baff (diff) | |
add the SETULT condition code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30067 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 1 | ||||
| -rw-r--r-- | test/CodeGen/ARM/branch.ll | 16 |
2 files changed, 16 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 34b04ffd21..eba7c78aaa 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -91,6 +91,7 @@ static ARMCC::CondCodes DAGCCToARMCC(ISD::CondCode CC) { case ISD::SETEQ: return ARMCC::EQ; case ISD::SETGE: return ARMCC::GE; case ISD::SETUGE: return ARMCC::CS; + case ISD::SETULT: return ARMCC::CC; } } diff --git a/test/CodeGen/ARM/branch.ll b/test/CodeGen/ARM/branch.ll index e4ac1af4ce..57aa179a7c 100644 --- a/test/CodeGen/ARM/branch.ll +++ b/test/CodeGen/ARM/branch.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as < %s | llc -march=arm && ; RUN: llvm-as < %s | llc -march=arm | grep bne && ; RUN: llvm-as < %s | llc -march=arm | grep bge && -; RUN: llvm-as < %s | llc -march=arm | grep bcs +; RUN: llvm-as < %s | llc -march=arm | grep bcs && +; RUN: llvm-as < %s | llc -march=arm | grep bcc void %f1(int %a, int %b, int* %v) { entry: @@ -41,3 +42,16 @@ cond_true: ; preds = %entry return: ; preds = %entry ret void } + +void %f4(uint %a, uint %b, int* %v) { +entry: + %tmp = setlt uint %a, %b ; <bool> [#uses=1] + br bool %tmp, label %return, label %cond_true + +cond_true: ; preds = %entry + store int 0, int* %v + ret void + +return: ; preds = %entry + ret void +} |