diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-03-20 06:04:52 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-03-20 06:04:52 +0000 |
| commit | ba753c61b7d59f570fb58e3d1416254f51407f96 (patch) | |
| tree | 45f3c800877e445aa5cfa171443070b8375a5c89 | |
| parent | 420132e1eb1ee1002d79c9605ddbe21d9f686f6b (diff) | |
Move a few things around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26893 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 10 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 17 |
2 files changed, 14 insertions, 13 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 7a4f6ead89..e1cca71a98 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -13,6 +13,15 @@ // //===----------------------------------------------------------------------===// +// Some 'special' instructions +def IMPLICIT_DEF_VR64 : I<0, Pseudo, (ops VR64:$dst), + "#IMPLICIT_DEF $dst", + [(set VR64:$dst, (v8i8 (undef)))]>, + Requires<[HasMMX]>; + +def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; +def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; + // Move Instructions def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, R32:$src), "movd {$src, $dst|$dst, $src}", []>, TB, @@ -33,3 +42,4 @@ def MOVQ64rm : I<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src), def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src), "movq {$src, $dst|$dst, $src}", []>, TB, Requires<[HasMMX]>; + diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 66daddbb78..92412cfd63 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -348,6 +348,10 @@ def IMPLICIT_DEF_VR128 : I<0, Pseudo, (ops VR128:$dst), Requires<[HasSSE1]>; def : Pat<(v2f64 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; +def : Pat<(v16i8 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; +def : Pat<(v8i16 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; +def : Pat<(v4i32 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; +def : Pat<(v2i64 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; // Move Instructions def MOVAPSrr : PSI<0x28, MRMSrcReg, (ops VR128:$dst, VR128:$src), @@ -694,19 +698,6 @@ def UNPCKLPDrm : PDI<0x14, MRMSrcMem, // SSE integer instructions //===----------------------------------------------------------------------===// -// Some 'special' instructions -def IMPLICIT_DEF_VR64 : I<0, Pseudo, (ops VR64:$dst), - "#IMPLICIT_DEF $dst", - [(set VR64:$dst, (v8i8 (undef)))]>, - Requires<[HasMMX]>; - -def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; -def : Pat<(v16i8 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; -def : Pat<(v8i16 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; -def : Pat<(v4i32 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; -def : Pat<(v2i64 (undef)), (IMPLICIT_DEF_VR128)>, Requires<[HasSSE2]>; - // Move Instructions def MOVD128rr : PDI<0x6E, MRMSrcReg, (ops VR128:$dst, R32:$src), "movd {$src, $dst|$dst, $src}", []>; |