diff options
| author | Bill Wendling <isanbard@gmail.com> | 2011-10-18 21:55:58 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-10-18 21:55:58 +0000 |
| commit | b9fecf4e077cfd54884ce96ef6bd9febf0d84191 (patch) | |
| tree | 4b242a141a3990f50bf97e65b7dc37a6ce78dc61 | |
| parent | 2933e4b2e65a5c5ae9958d4550cd47db793b9e54 (diff) | |
The immediate may be too large for the CMP instruction. Move it into a register
and use that in the CMP.
<rdar://problem/10305266>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142429 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index ac194145e0..a524ddc2e3 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -5760,29 +5760,34 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const { .addFrameIndex(FI) .addImm(4) .addMemOperand(FIMMOLd)); - AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri)) - .addReg(NewVReg1) + + unsigned NewVReg2 = MRI->createVirtualRegister(TRC); + AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), NewVReg2) .addImm(LPadList.size())); + + AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr)) + .addReg(NewVReg1) + .addReg(NewVReg2)); BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc)) .addMBB(TrapBB) .addImm(ARMCC::HI) .addReg(ARM::CPSR); - unsigned NewVReg2 = MRI->createVirtualRegister(TRC); - AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg2) + unsigned NewVReg3 = MRI->createVirtualRegister(TRC); + AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT),NewVReg3) .addJumpTableIndex(MJTI) .addImm(UId)); - unsigned NewVReg3 = MRI->createVirtualRegister(TRC); + unsigned NewVReg4 = MRI->createVirtualRegister(TRC); AddDefaultCC( AddDefaultPred( - BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg3) - .addReg(NewVReg2, RegState::Kill) + BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg4) + .addReg(NewVReg3, RegState::Kill) .addReg(NewVReg1) .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); BuildMI(DispContBB, dl, TII->get(ARM::t2BR_JT)) - .addReg(NewVReg3, RegState::Kill) + .addReg(NewVReg4, RegState::Kill) .addReg(NewVReg1) .addJumpTableIndex(MJTI) .addImm(UId); |