diff options
author | Jim Grosbach <grosbach@apple.com> | 2011-07-29 17:42:17 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2011-07-29 17:42:17 +0000 |
commit | b48ce900f9c8d9c7706b82b346cf9c2212bb3be2 (patch) | |
tree | c0db1900ef6ca0ca07ad0f4b7bac9db47cf5b38b | |
parent | 71d3d67508176091575714dddf008b77db4089c9 (diff) |
ARM range checking for mode on CPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136473 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index aa68ae236c..a98d6f3ec1 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1319,13 +1319,13 @@ class CPS<dag iops, string asm_ops> } let M = 1 in - def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode), + def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, imm0_15:$mode), "$imod\t$iflags, $mode">; let mode = 0, M = 0 in def CPS2p : CPS<(ins imod_op:$imod, iflags_op:$iflags), "$imod\t$iflags">; let imod = 0, iflags = 0, M = 1 in - def CPS1p : CPS<(ins i32imm:$mode), "\t$mode">; + def CPS1p : CPS<(ins imm0_15:$mode), "\t$mode">; // Preload signals the memory system of possible future data/instruction access. // These are for disassembly only. |