diff options
author | Chris Lattner <sabre@nondot.org> | 2006-02-22 23:00:51 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2006-02-22 23:00:51 +0000 |
commit | b3befd41b4b5aa882bed9796bbb097df29b505ac (patch) | |
tree | 305713aa4b5c631ed1d39c0c2b6b5887de9f916f | |
parent | 864635ad7b3046d3042311423071152c613961de (diff) |
Don't return registers from register classes that aren't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index e82e7f768e..c875a85c80 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -766,11 +766,24 @@ getRegForInlineAsmConstraint(const std::string &Constraint, for (MRegisterInfo::regclass_iterator RCI = RI->regclass_begin(), E = RI->regclass_end(); RCI != E; ++RCI) { const TargetRegisterClass *RC = *RCI; + + // If none of the the value types for this register class are valid, we + // can't use it. For example, 64-bit reg classes on 32-bit targets. + bool isLegal = false; + for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); + I != E; ++I) { + if (isTypeLegal(*I)) { + isLegal = true; + break; + } + } + + if (!isLegal) continue; + for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E; ++I) { - if (StringsEqualNoCase(RegName, RI->get(*I).Name)) { + if (StringsEqualNoCase(RegName, RI->get(*I).Name)) return std::make_pair(*I, RC); - } } } |