diff options
| author | Dan Gohman <gohman@apple.com> | 2008-12-20 17:19:40 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-12-20 17:19:40 +0000 |
| commit | b12b1a27f50628f5bd895de5278f70a8c905ca0a (patch) | |
| tree | 0b1143b623dc63c0f7c1edadb99e02342bbb010d | |
| parent | edf22b97d0d525ed4ec89eda1708c24c45c54b57 (diff) | |
Fix fast-isel to not emit invalid assembly when presented with a
constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61281 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/fast-isel-shift-imm.ll | 7 |
2 files changed, 8 insertions, 1 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index c4b45bf431..a81ecfeace 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -893,7 +893,7 @@ bool X86FastISel::X86SelectShift(Instruction *I) { if (ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1))) { unsigned ResultReg = createResultReg(RC); BuildMI(MBB, TII.get(OpImm), - ResultReg).addReg(Op0Reg).addImm(CI->getZExtValue()); + ResultReg).addReg(Op0Reg).addImm(CI->getZExtValue() & 0xff); UpdateValueMap(I, ResultReg); return true; } diff --git a/test/CodeGen/X86/fast-isel-shift-imm.ll b/test/CodeGen/X86/fast-isel-shift-imm.ll new file mode 100644 index 0000000000..c47b99013a --- /dev/null +++ b/test/CodeGen/X86/fast-isel-shift-imm.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 -fast | grep {sarl \$80, %eax} +; PR3242 + +define i32 @foo(i32 %x) nounwind { + %y = ashr i32 %x, 50000 + ret i32 %y +} |