diff options
author | Dan Gohman <gohman@apple.com> | 2008-03-31 20:32:52 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2008-03-31 20:32:52 +0000 |
commit | b061c4bc44caf62a16adad6047cda60785c2d0a4 (patch) | |
tree | d9b9092680f8b93eb8642454450be69d167722fe | |
parent | 56a7c88cc532e8a72a8c3c303559500cd24d438b (diff) |
Fix a DAGCombiner optimization to respect volatile qualification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 | ||||
-rw-r--r-- | test/CodeGen/X86/pr2182.ll | 24 |
2 files changed, 26 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 9f44c6a728..4eccb815e3 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4387,7 +4387,8 @@ SDOperand DAGCombiner::visitLOAD(SDNode *N) { // value. // TODO: Handle store large -> read small portion. // TODO: Handle TRUNCSTORE/LOADEXT - if (LD->getExtensionType() == ISD::NON_EXTLOAD) { + if (LD->getExtensionType() == ISD::NON_EXTLOAD && + !LD->isVolatile()) { if (ISD::isNON_TRUNCStore(Chain.Val)) { StoreSDNode *PrevST = cast<StoreSDNode>(Chain); if (PrevST->getBasePtr() == Ptr && diff --git a/test/CodeGen/X86/pr2182.ll b/test/CodeGen/X86/pr2182.ll new file mode 100644 index 0000000000..f65725db8b --- /dev/null +++ b/test/CodeGen/X86/pr2182.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc | grep {addl \$3, (%eax)} | count 4 +; PR2182 + +target datalayout = +"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" +@x = weak global i32 0 ; <i32*> [#uses=8] + +define void @loop_2() nounwind { +entry: + %tmp = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1 = add i32 %tmp, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1, i32* @x, align 4 + %tmp.1 = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1.1 = add i32 %tmp.1, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1.1, i32* @x, align 4 + %tmp.2 = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1.2 = add i32 %tmp.2, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1.2, i32* @x, align 4 + %tmp.3 = volatile load i32* @x, align 4 ; <i32> [#uses=1] + %tmp1.3 = add i32 %tmp.3, 3 ; <i32> [#uses=1] + volatile store i32 %tmp1.3, i32* @x, align 4 + ret void +} |