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authorRafael Espindola <rafael.espindola@gmail.com>2011-07-02 05:34:02 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2011-07-02 05:34:02 +0000
commita9badd250cac2e5090eb950bb0456c37ee6c8f7a (patch)
tree2b6eb2a61b8bdbe2444f89336d7318ab06f3273e
parent839656120b70333970a7bb696b8047a1c76de1c0 (diff)
Check the VN of the src register at the two copies, not just the
register number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134309 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/RegisterCoalescer.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp
index d5025b9e63..13ae04283a 100644
--- a/lib/CodeGen/RegisterCoalescer.cpp
+++ b/lib/CodeGen/RegisterCoalescer.cpp
@@ -1203,7 +1203,6 @@ static bool RegistersDefinedFromSameValue(LiveIntervals &li,
VNInfo *VNI,
LiveRange *LR,
SmallVector<MachineInstr*, 8> &DupCopies) {
- return false; // To see if this fixes the i386 dragonegg buildbot miscompile.
// FIXME: This is very conservative. For example, we don't handle
// physical registers.
@@ -1252,6 +1251,12 @@ static bool RegistersDefinedFromSameValue(LiveIntervals &li,
if (Src != OtherSrc)
return false;
+ // If the copies use two different value numbers of X, we cannot merge
+ // A and B.
+ if (SrcInt.FindLiveRangeContaining(Other->def)->valno !=
+ SrcInt.FindLiveRangeContaining(VNI->def)->valno)
+ return false;
+
DupCopies.push_back(MI);
return true;