aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2005-10-28 04:57:11 +0000
committerChris Lattner <sabre@nondot.org>2005-10-28 04:57:11 +0000
commita411bef1055f6f415a97ac6959862da743ec1787 (patch)
tree07af0ac1d6ca574b4f93319b7581be2d7e7830db
parent9489c04efc47a68af65e226e50f03d488094ffce (diff)
Eliminate getClass, it is not needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24053 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/IA64/IA64RegisterInfo.cpp13
1 files changed, 6 insertions, 7 deletions
diff --git a/lib/Target/IA64/IA64RegisterInfo.cpp b/lib/Target/IA64/IA64RegisterInfo.cpp
index c1c1ea53f7..73ee398218 100644
--- a/lib/Target/IA64/IA64RegisterInfo.cpp
+++ b/lib/Target/IA64/IA64RegisterInfo.cpp
@@ -53,13 +53,12 @@ void IA64RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
unsigned SrcReg, int FrameIdx,
const TargetRegisterClass *RC) const{
- if (getClass(SrcReg) == IA64::FPRegisterClass) {
+ if (RC == IA64::FPRegisterClass) {
BuildMI(MBB, MI, IA64::STF8, 2).addFrameIndex(FrameIdx).addReg(SrcReg);
- }
- else if (getClass(SrcReg) == IA64::GRRegisterClass) {
+ } else if (RC == IA64::GRRegisterClass) {
BuildMI(MBB, MI, IA64::ST8, 2).addFrameIndex(FrameIdx).addReg(SrcReg);
}
- else if (getClass(SrcReg) == IA64::PRRegisterClass) {
+ else if (RC == IA64::PRRegisterClass) {
/* we use IA64::r2 as a temporary register for doing this hackery. */
// first we load 0:
BuildMI(MBB, MI, IA64::MOV, 1, IA64::r2).addReg(IA64::r0);
@@ -77,11 +76,11 @@ void IA64RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC)const{
- if (getClass(DestReg) == IA64::FPRegisterClass) {
+ if (RC == IA64::FPRegisterClass) {
BuildMI(MBB, MI, IA64::LDF8, 1, DestReg).addFrameIndex(FrameIdx);
- } else if (getClass(DestReg) == IA64::GRRegisterClass) {
+ } else if (RC == IA64::GRRegisterClass) {
BuildMI(MBB, MI, IA64::LD8, 1, DestReg).addFrameIndex(FrameIdx);
- } else if (getClass(DestReg) == IA64::PRRegisterClass) {
+ } else if (RC == IA64::PRRegisterClass) {
// first we load a byte from the stack into r2, our 'predicate hackery'
// scratch reg
BuildMI(MBB, MI, IA64::LD8, 1, IA64::r2).addFrameIndex(FrameIdx);