diff options
author | Owen Anderson <resistor@mac.com> | 2010-11-02 22:28:01 +0000 |
---|---|---|
committer | Owen Anderson <resistor@mac.com> | 2010-11-02 22:28:01 +0000 |
commit | a2b50b300ec32dc223a82a256a3d93b8eaf41662 (patch) | |
tree | 92fed10c0f6b843faf174c5d6438e1aa81b3da36 | |
parent | d6e623ad15220359c282878ea9d374b7dffb0b9e (diff) |
Rename encoder methods to match naming convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118093 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 7 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 4 | ||||
-rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 8 |
3 files changed, 8 insertions, 11 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 429b1d3357..0ef65bb23c 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -101,9 +101,6 @@ namespace { unsigned OpIdx); unsigned getMachineSoImmOpValue(unsigned SoImm); - unsigned getAddrMode6RegisterOperand(const MachineInstr &MI); - unsigned getAddrMode6OffsetOperand(const MachineInstr &MI); - unsigned getAddrModeSBit(const MachineInstr &MI, const TargetInstrDesc &TID) const; @@ -174,9 +171,9 @@ namespace { const { return 0; } unsigned getImmMinusOneOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } - unsigned getAddrMode6RegisterOperand(const MachineInstr &MI, unsigned Op) + unsigned getAddrMode6AddressOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } - unsigned getAddrMode6OffsetOperand(const MachineInstr &MI, unsigned Op) + unsigned getAddrMode6OffsetOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index c241eee03f..3c1da1efb6 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -472,13 +472,13 @@ def addrmode6 : Operand<i32>, ComplexPattern<i32, 2, "SelectAddrMode6", [], [SDNPWantParent]>{ let PrintMethod = "printAddrMode6Operand"; let MIOperandInfo = (ops GPR:$addr, i32imm); - string EncoderMethod = "getAddrMode6RegisterOperand"; + string EncoderMethod = "getAddrMode6AddressOpValue"; } def am6offset : Operand<i32> { let PrintMethod = "printAddrMode6OffsetOperand"; let MIOperandInfo = (ops GPR); - string EncoderMethod = "getAddrMode6OffsetOperand"; + string EncoderMethod = "getAddrMode6OffsetOpValue"; } // addrmodepc := pc + reg diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index b3dce29e5c..6935974455 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -99,8 +99,8 @@ public: unsigned getBitfieldInvertedMaskOpValue(const MCInst &MI, unsigned Op) const; unsigned getRegisterListOpValue(const MCInst &MI, unsigned Op) const; - unsigned getAddrMode6RegisterOperand(const MCInst &MI, unsigned Op) const; - unsigned getAddrMode6OffsetOperand(const MCInst &MI, unsigned Op) const; + unsigned getAddrMode6AddressOpValue(const MCInst &MI, unsigned Op) const; + unsigned getAddrMode6OffsetOpValue(const MCInst &MI, unsigned Op) const; unsigned getNumFixupKinds() const { assert(0 && "ARMMCCodeEmitter::getNumFixupKinds() not yet implemented."); @@ -297,7 +297,7 @@ unsigned ARMMCCodeEmitter::getRegisterListOpValue(const MCInst &MI, return Binary; } -unsigned ARMMCCodeEmitter::getAddrMode6RegisterOperand(const MCInst &MI, +unsigned ARMMCCodeEmitter::getAddrMode6AddressOpValue(const MCInst &MI, unsigned Op) const { const MCOperand &Reg = MI.getOperand(Op); const MCOperand &Imm = MI.getOperand(Op+1); @@ -313,7 +313,7 @@ unsigned ARMMCCodeEmitter::getAddrMode6RegisterOperand(const MCInst &MI, return RegNo | (Align << 4); } -unsigned ARMMCCodeEmitter::getAddrMode6OffsetOperand(const MCInst &MI, +unsigned ARMMCCodeEmitter::getAddrMode6OffsetOpValue(const MCInst &MI, unsigned Op) const { const MCOperand ®no = MI.getOperand(Op); if (regno.getReg() == 0) return 0x0D; |