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authorNick Lewycky <nicholas@mxc.ca>2008-09-30 06:08:34 +0000
committerNick Lewycky <nicholas@mxc.ca>2008-09-30 06:08:34 +0000
commita06cf82a7b6cbfce77d4449f2c9933dc332adcf0 (patch)
tree90daa2d6738f5c9a155887004f6bea02fe456576
parent5396c99baa8fe0c821b9157590d8e9cd498b15bc (diff)
Fix misoptimization of: xor i1 (icmp eq (X, C1), icmp s[lg]t (X, C2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56834 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/InstructionCombining.cpp5
-rw-r--r--test/Transforms/InstCombine/2008-09-29-FoldingOr.ll10
2 files changed, 13 insertions, 2 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 9023db7d50..6cac395405 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -3023,7 +3023,7 @@ Instruction *InstCombiner::visitSRem(BinaryOperator &I) {
I.setOperand(1, RHSNeg);
return &I;
}
-
+
// If the sign bits of both operands are zero (i.e. we can prove they are
// unsigned inputs), turn this into a urem.
if (I.getType()->isInteger()) {
@@ -4205,7 +4205,8 @@ Instruction *InstCombiner::visitOr(BinaryOperator &I) {
// Ensure that the larger constant is on the RHS.
ICmpInst *LHS = cast<ICmpInst>(Op0);
bool NeedsSwap;
- if (ICmpInst::isSignedPredicate(LHSCC))
+ if (ICmpInst::isEquality(LHSCC) ? ICmpInst::isSignedPredicate(RHSCC)
+ : ICmpInst::isSignedPredicate(LHSCC))
NeedsSwap = LHSCst->getValue().sgt(RHSCst->getValue());
else
NeedsSwap = LHSCst->getValue().ugt(RHSCst->getValue());
diff --git a/test/Transforms/InstCombine/2008-09-29-FoldingOr.ll b/test/Transforms/InstCombine/2008-09-29-FoldingOr.ll
new file mode 100644
index 0000000000..e7a8ca9b52
--- /dev/null
+++ b/test/Transforms/InstCombine/2008-09-29-FoldingOr.ll
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {or i1}
+; PR2844
+
+define i32 @test(i32 %p_74) {
+ %A = icmp eq i32 %p_74, 0 ; <i1> [#uses=1]
+ %B = icmp slt i32 %p_74, -638208501 ; <i1> [#uses=1]
+ %or.cond = or i1 %A, %B ; <i1> [#uses=1]
+ %iftmp.10.0 = select i1 %or.cond, i32 0, i32 1 ; <i32> [#uses=1]
+ ret i32 %iftmp.10.0
+}