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authorTim Northover <Tim.Northover@arm.com>2013-02-06 09:04:56 +0000
committerTim Northover <Tim.Northover@arm.com>2013-02-06 09:04:56 +0000
commit9e3b31345f0d17b757e183a8384db92616256926 (patch)
tree33d5bbc47edbeb3d0563dc918a8d008c953af3bd
parent95ce4c2ffb0ff31a79b060fb112659322a5be3bf (diff)
Add icache prefetch operations to AArch64
This adds hints to the various "prfm" instructions so that they can affect the instruction cache as well as the data cache. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174495 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/AArch64/Utils/AArch64BaseInfo.cpp6
-rw-r--r--lib/Target/AArch64/Utils/AArch64BaseInfo.h6
-rw-r--r--test/MC/AArch64/basic-a64-instructions.s12
-rw-r--r--test/MC/Disassembler/AArch64/basic-a64-instructions.txt38
4 files changed, 62 insertions, 0 deletions
diff --git a/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
index 5f09074bcf..ab9bba1836 100644
--- a/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
+++ b/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
@@ -120,6 +120,12 @@ const NamedImmMapper::Mapping A64PRFM::PRFMMapper::PRFMPairs[] = {
{"pldl2strm", PLDL2STRM},
{"pldl3keep", PLDL3KEEP},
{"pldl3strm", PLDL3STRM},
+ {"plil1keep", PLIL1KEEP},
+ {"plil1strm", PLIL1STRM},
+ {"plil2keep", PLIL2KEEP},
+ {"plil2strm", PLIL2STRM},
+ {"plil3keep", PLIL3KEEP},
+ {"plil3strm", PLIL3STRM},
{"pstl1keep", PSTL1KEEP},
{"pstl1strm", PSTL1STRM},
{"pstl2keep", PSTL2KEEP},
diff --git a/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/lib/Target/AArch64/Utils/AArch64BaseInfo.h
index 48e6c83fd2..5eebf44431 100644
--- a/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+++ b/lib/Target/AArch64/Utils/AArch64BaseInfo.h
@@ -248,6 +248,12 @@ namespace A64PRFM {
PLDL2STRM = 0x03,
PLDL3KEEP = 0x04,
PLDL3STRM = 0x05,
+ PLIL1KEEP = 0x08,
+ PLIL1STRM = 0x09,
+ PLIL2KEEP = 0x0a,
+ PLIL2STRM = 0x0b,
+ PLIL3KEEP = 0x0c,
+ PLIL3STRM = 0x0d,
PSTL1KEEP = 0x10,
PSTL1STRM = 0x11,
PSTL2KEEP = 0x12,
diff --git a/test/MC/AArch64/basic-a64-instructions.s b/test/MC/AArch64/basic-a64-instructions.s
index e16b2ea724..e3b1ea8326 100644
--- a/test/MC/AArch64/basic-a64-instructions.s
+++ b/test/MC/AArch64/basic-a64-instructions.s
@@ -2423,6 +2423,12 @@ _func:
prfm pldl2strm, [x2]
prfm pldl3keep, [x5]
prfm pldl3strm, [x6]
+ prfm plil1keep, [sp, #8]
+ prfm plil1strm, [x3]
+ prfm plil2keep, [x5,#16]
+ prfm plil2strm, [x2]
+ prfm plil3keep, [x5]
+ prfm plil3strm, [x6]
prfm pstl1keep, [sp, #8]
prfm pstl1strm, [x3]
prfm pstl2keep, [x5,#16]
@@ -2436,6 +2442,12 @@ _func:
// CHECK: prfm pldl2strm, [x2, #0] // encoding: [0x43,0x00,0x80,0xf9]
// CHECK: prfm pldl3keep, [x5, #0] // encoding: [0xa4,0x00,0x80,0xf9]
// CHECK: prfm pldl3strm, [x6, #0] // encoding: [0xc5,0x00,0x80,0xf9]
+// CHECK: prfm plil1keep, [sp, #8] // encoding: [0xe8,0x07,0x80,0xf9]
+// CHECK: prfm plil1strm, [x3, #0] // encoding: [0x69,0x00,0x80,0xf9]
+// CHECK: prfm plil2keep, [x5, #16] // encoding: [0xaa,0x08,0x80,0xf9]
+// CHECK: prfm plil2strm, [x2, #0] // encoding: [0x4b,0x00,0x80,0xf9]
+// CHECK: prfm plil3keep, [x5, #0] // encoding: [0xac,0x00,0x80,0xf9]
+// CHECK: prfm plil3strm, [x6, #0] // encoding: [0xcd,0x00,0x80,0xf9]
// CHECK: prfm pstl1keep, [sp, #8] // encoding: [0xf0,0x07,0x80,0xf9]
// CHECK: prfm pstl1strm, [x3, #0] // encoding: [0x71,0x00,0x80,0xf9]
// CHECK: prfm pstl2keep, [x5, #16] // encoding: [0xb2,0x08,0x80,0xf9]
diff --git a/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
index 9c5a5ebcf7..2de5f700c1 100644
--- a/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
+++ b/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
@@ -2335,6 +2335,44 @@
0x43 0xfd 0x7f 0xfd
0xec 0xff 0xbf 0x3d
+# CHECK: prfm pldl1keep, [sp, #8]
+# CHECK: prfm pldl1strm, [x3, #0]
+# CHECK: prfm pldl2keep, [x5, #16]
+# CHECK: prfm pldl2strm, [x2, #0]
+# CHECK: prfm pldl3keep, [x5, #0]
+# CHECK: prfm pldl3strm, [x6, #0]
+# CHECK: prfm plil1keep, [sp, #8]
+# CHECK: prfm plil1strm, [x3, #0]
+# CHECK: prfm plil2keep, [x5, #16]
+# CHECK: prfm plil2strm, [x2, #0]
+# CHECK: prfm plil3keep, [x5, #0]
+# CHECK: prfm plil3strm, [x6, #0]
+# CHECK: prfm pstl1keep, [sp, #8]
+# CHECK: prfm pstl1strm, [x3, #0]
+# CHECK: prfm pstl2keep, [x5, #16]
+# CHECK: prfm pstl2strm, [x2, #0]
+# CHECK: prfm pstl3keep, [x5, #0]
+# CHECK: prfm pstl3strm, [x6, #0]
+0xe0 0x07 0x80 0xf9
+0x61 0x00 0x80 0xf9
+0xa2 0x08 0x80 0xf9
+0x43 0x00 0x80 0xf9
+0xa4 0x00 0x80 0xf9
+0xc5 0x00 0x80 0xf9
+0xe8 0x07 0x80 0xf9
+0x69 0x00 0x80 0xf9
+0xaa 0x08 0x80 0xf9
+0x4b 0x00 0x80 0xf9
+0xac 0x00 0x80 0xf9
+0xcd 0x00 0x80 0xf9
+0xf0 0x07 0x80 0xf9
+0x71 0x00 0x80 0xf9
+0xb2 0x08 0x80 0xf9
+0x53 0x00 0x80 0xf9
+0xb4 0x00 0x80 0xf9
+0xd5 0x00 0x80 0xf9
+
+
#------------------------------------------------------------------------------
# Load/store (register offset)
#------------------------------------------------------------------------------