MC/X86: Push immediate operands as immediates not expressions when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 24 insertions, 20 deletions

diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 2c79eeb962..84d7bb7a6f 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -184,6 +184,14 @@ struct X86Operand : public MCParsedAsmOperand {
 
   bool isReg() const { return Kind == Register; }
 
+  void addExpr(MCInst &Inst, const MCExpr *Expr) const {
+    // Add as immediates when possible.
+    if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
+      Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
+    else
+      Inst.addOperand(MCOperand::CreateExpr(Expr));
+  }
+
   void addRegOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
     Inst.addOperand(MCOperand::CreateReg(getReg()));
@@ -191,13 +199,13 @@ struct X86Operand : public MCParsedAsmOperand {
 
   void addImmOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
-    Inst.addOperand(MCOperand::CreateExpr(getImm()));
+    addExpr(Inst, getImm());
   }
 
   void addImmSExt8Operands(MCInst &Inst, unsigned N) const {
     // FIXME: Support user customization of the render method.
     assert(N == 1 && "Invalid number of operands!");
-    Inst.addOperand(MCOperand::CreateExpr(getImm()));
+    addExpr(Inst, getImm());
   }
 
   void addMemOperands(MCInst &Inst, unsigned N) const {
@@ -205,7 +213,7 @@ struct X86Operand : public MCParsedAsmOperand {
     Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
     Inst.addOperand(MCOperand::CreateImm(getMemScale()));
     Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
-    Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
+    addExpr(Inst, getMemDisp());
     Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
   }
 
@@ -219,7 +227,7 @@ struct X86Operand : public MCParsedAsmOperand {
     Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
     Inst.addOperand(MCOperand::CreateImm(getMemScale()));
     Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
-    Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
+    addExpr(Inst, getMemDisp());
   }
 
   static X86Operand *CreateToken(StringRef Str, SMLoc Loc) {
diff --git a/test/MC/AsmParser/X86/x86_64-new-encoder.s b/test/MC/AsmParser/X86/x86_64-new-encoder.s
index cdbac1e53b..f007312177 100644
--- a/test/MC/AsmParser/X86/x86_64-new-encoder.s
+++ b/test/MC/AsmParser/X86/x86_64-new-encoder.s
@@ -7,24 +7,20 @@ movl	foo(%rip), %eax
 
 movb	$12, foo(%rip)
 // CHECK: movb	$12, foo(%rip)
-// CHECK: encoding: [0xc6,0x05,A,A,A,A,B]
+// CHECK: encoding: [0xc6,0x05,A,A,A,A,0x0c]
 // CHECK:    fixup A - offset: 2, value: foo-1, kind: reloc_riprel_4byte
-// CHECK:    fixup B - offset: 6, value: 12, kind: FK_Data_1
 
 movw	$12, foo(%rip)
 // CHECK: movw	$12, foo(%rip)
-// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,B,B]
+// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,0x0c,0x00]
 // CHECK:    fixup A - offset: 3, value: foo-2, kind: reloc_riprel_4byte
-// CHECK:    fixup B - offset: 7, value: 12, kind: FK_Data_2
 
 movl	$12, foo(%rip)
 // CHECK: movl	$12, foo(%rip)
-// CHECK: encoding: [0xc7,0x05,A,A,A,A,B,B,B,B]
+// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
 // CHECK:    fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte
-// CHECK:    fixup B - offset: 6, value: 12, kind: FK_Data_4
 
 movq	$12, foo(%rip)
 // CHECK:  movq	$12, foo(%rip)
-// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,B,B,B,B]
+// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
 // CHECK:    fixup A - offset: 3, value: foo-4, kind: reloc_riprel_4byte
-// CHECK:    fixup B - offset: 7, value: 12, kind: FK_Data_4
diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index a74dcd24ea..b558c2eb5f 100644
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -109,31 +109,31 @@
         repne;scasb
 
 // CHECK: lock
-// CHECK: cmpxchgb %al, 0(%ebx)
+// CHECK: cmpxchgb %al, (%ebx)
         lock;cmpxchgb %al, 0(%ebx)
 
 // CHECK: cs
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
         cs;movb 0(%eax), %al
 
 // CHECK: ss
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
         ss;movb 0(%eax), %al
 
 // CHECK: ds
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
         ds;movb 0(%eax), %al
 
 // CHECK: es
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
         es;movb 0(%eax), %al
 
 // CHECK: fs
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
         fs;movb 0(%eax), %al
 
 // CHECK: gs
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
         gs;movb 0(%eax), %al
 
 // CHECK: fadd %st(0)
diff --git a/test/MC/AsmParser/X86/x86_operands.s b/test/MC/AsmParser/X86/x86_operands.s
index 433c9bf772..8e6543e7bd 100644
--- a/test/MC/AsmParser/X86/x86_operands.s
+++ b/test/MC/AsmParser/X86/x86_operands.s
@@ -24,7 +24,7 @@
         addl $1, (4+4)(%eax)
 # CHECK: addl $1, 8(%eax)
         addl $1, 8(%eax)
-# CHECK: addl $1, 0(%eax)
+# CHECK: addl $1, (%eax)
         addl $1, (%eax)
 # CHECK: addl $1, 4+4(,%eax)
         addl $1, (4+4)(,%eax)