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authorAnton Korobeynikov <asl@math.spbu.ru>2009-05-10 14:49:00 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-05-10 14:49:00 +0000
commit9c11d21d907309fc19413da671d6b2d0867d0c9f (patch)
tree436fa15f90e2b6002ab34ca1cc693380739be663
parent19f76f5263a026e109d7d468c8fe2d1ae6407054 (diff)
Add imm-reg and imm-mem patters for cmp on msp430
(imm is allowed to be source operand, not dest...) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71393 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/MSP430/MSP430InstrInfo.td14
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td
index 93f5c09db1..de1b2ad648 100644
--- a/lib/Target/MSP430/MSP430InstrInfo.td
+++ b/lib/Target/MSP430/MSP430InstrInfo.td
@@ -708,6 +708,20 @@ def CMP16rr : Pseudo<(outs), (ins GR16:$src1, GR16:$src2),
"cmp.w\t{$src1, $src2}",
[(MSP430cmp GR16:$src1, GR16:$src2), (implicit SRW)]>;
+def CMP8ir : Pseudo<(outs), (ins i8imm:$src1, GR8:$src2),
+ "cmp.b\t{$src1, $src2}",
+ [(MSP430cmp imm:$src1, GR8:$src2), (implicit SRW)]>;
+def CMP16ir : Pseudo<(outs), (ins i16imm:$src1, GR16:$src2),
+ "cmp.w\t{$src1, $src2}",
+ [(MSP430cmp imm:$src1, GR16:$src2), (implicit SRW)]>;
+
+def CMP8im : Pseudo<(outs), (ins i8imm:$src1, memsrc:$src2),
+ "cmp.b\t{$src1, $src2}",
+ [(MSP430cmp (i8 imm:$src1), (load addr:$src2)), (implicit SRW)]>;
+def CMP16im : Pseudo<(outs), (ins i16imm:$src1, memsrc:$src2),
+ "cmp.w\t{$src1, $src2}",
+ [(MSP430cmp (i16 imm:$src1), (load addr:$src2)), (implicit SRW)]>;
+
// FIXME: imm is allowed only on src operand, not on dst.
//def CMP8ri : Pseudo<(outs), (ins GR8:$src1, i8imm:$src2),