diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-11-01 23:45:50 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-01 23:45:50 +0000 |
| commit | 9af3d1c0dc2250793ada1ca6cfa98e9f1253f7f9 (patch) | |
| tree | 47bd5111e179c8c9024c18e9023a96660e696b52 | |
| parent | a502423d1e4db0376ab3e1e45a7e9df79cc43952 (diff) | |
Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME
for handling the fixup necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117978 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index afebadc818..5757046e99 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -178,6 +178,15 @@ unsigned ARMMCCodeEmitter::getAddrModeImm12OpValue(const MCInst &MI, // {11-0} = imm12 const MCOperand &MO = MI.getOperand(OpIdx); const MCOperand &MO1 = MI.getOperand(OpIdx + 1); + uint32_t Binary = 0; + + // If The first operand isn't a register, we have a label reference. + if (!MO.isReg()) { + Binary |= ARM::PC << 13; // Rn is PC. + // FIXME: Add a fixup referencing the label. + return Binary; + } + unsigned Reg = getARMRegisterNumbering(MO.getReg()); int32_t Imm12 = MO1.getImm(); bool isAdd = Imm12 >= 0; @@ -187,7 +196,7 @@ unsigned ARMMCCodeEmitter::getAddrModeImm12OpValue(const MCInst &MI, // Immediate is always encoded as positive. The 'U' bit controls add vs sub. if (Imm12 < 0) Imm12 = -Imm12; - uint32_t Binary = Imm12 & 0xfff; + Binary = Imm12 & 0xfff; if (isAdd) Binary |= (1 << 12); Binary |= (Reg << 13); |