diff options
author | Chris Lattner <sabre@nondot.org> | 2005-12-17 20:50:42 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2005-12-17 20:50:42 +0000 |
commit | 9a60ff654a0c633b284ef59981716fd189cb78c0 (patch) | |
tree | 3b27b0f069bbfc04af7142e10e53216c8ac2fe0b | |
parent | 53ec2035eb686c25013d47405fd0b178b60d59c8 (diff) |
Sparc doesn't have sext_inreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Sparc/SparcISelDAGToDAG.cpp | 5 | ||||
-rw-r--r-- | lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp index 21943a902d..a2eb9c7acb 100644 --- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -60,6 +60,11 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM) addRegisterClass(MVT::i32, V8::IntRegsRegisterClass); addRegisterClass(MVT::f32, V8::FPRegsRegisterClass); addRegisterClass(MVT::f64, V8::DFPRegsRegisterClass); + + // Sparc doesn't have sext_inreg, replace them with shl/sra + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand); + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); computeRegisterProperties(); } diff --git a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp index 21943a902d..a2eb9c7acb 100644 --- a/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp +++ b/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp @@ -60,6 +60,11 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM) addRegisterClass(MVT::i32, V8::IntRegsRegisterClass); addRegisterClass(MVT::f32, V8::FPRegsRegisterClass); addRegisterClass(MVT::f64, V8::DFPRegsRegisterClass); + + // Sparc doesn't have sext_inreg, replace them with shl/sra + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand); + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); + setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); computeRegisterProperties(); } |