diff options
| author | Jack Carter <jack.carter@imgtec.com> | 2013-03-28 23:02:21 +0000 |
|---|---|---|
| committer | Jack Carter <jack.carter@imgtec.com> | 2013-03-28 23:02:21 +0000 |
| commit | 94fcfaf3a9f1179edb3b8053fe7b23eab6fb83bb (patch) | |
| tree | 5460432b5babe355c274511b1ffc0820390113d7 | |
| parent | bad24f757d430ed9ef5348da58aa20d03409d6a0 (diff) | |
[Mips Assembler] Add alias definitions for jal
Mips assembler allows following to be used as aliased instructions:
jal $rs for jalr $rs
jal $rd,$rd for jalr $rd,$rs
This patch provides alias definitions in td files and test cases to show the usage.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178304 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 4 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 3 | ||||
| -rw-r--r-- | test/MC/Mips/mips-jump-instructions.s | 16 |
3 files changed, 22 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 5903b9e623..1d5912a035 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -332,6 +332,10 @@ def : InstAlias<"not $rt, $rs", def : InstAlias<"j $rs", (JR64 CPU64Regs:$rs), 0>, Requires<[HasMips64]>; def : InstAlias<"jalr $rs", (JALR64 RA_64, CPU64Regs:$rs)>, Requires<[HasMips64]>; +def : InstAlias<"jal $rs", (JALR64 RA_64, CPU64Regs:$rs), 0>, + Requires<[HasMips64]>; +def : InstAlias<"jal $rd,$rs", (JALR64 CPU64Regs:$rd, CPU64Regs:$rs), 0>, + Requires<[HasMips64]>; def : InstAlias<"daddu $rs, $rt, $imm", (DADDiu CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, simm16_64:$imm), 1>; diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 022987f12e..1c523d5bd8 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1001,6 +1001,9 @@ def : InstAlias<"and $rs, $rt, $imm", def : InstAlias<"j $rs", (JR CPURegs:$rs), 0>, Requires<[NotMips64]>; def : InstAlias<"jalr $rs", (JALR RA, CPURegs:$rs)>, Requires<[NotMips64]>; +def : InstAlias<"jal $rs", (JALR RA, CPURegs:$rs), 0>, Requires<[NotMips64]>; +def : InstAlias<"jal $rd,$rs", (JALR CPURegs:$rd, CPURegs:$rs), 0>, + Requires<[NotMips64]>; def : InstAlias<"not $rt, $rs", (NOR CPURegsOpnd:$rt, CPURegsOpnd:$rs, ZERO), 1>; def : InstAlias<"neg $rt, $rs", diff --git a/test/MC/Mips/mips-jump-instructions.s b/test/MC/Mips/mips-jump-instructions.s index 849eae9325..1dcb287738 100644 --- a/test/MC/Mips/mips-jump-instructions.s +++ b/test/MC/Mips/mips-jump-instructions.s @@ -1,4 +1,5 @@ -# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \ +# RUN: FileCheck %s # Check that the assembler can handle the documented syntax # for jumps and branches. # CHECK: .section __TEXT,__text,regular,pure_instructions @@ -25,6 +26,9 @@ # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK: bal 1332 # encoding: [0x4d,0x01,0x11,0x04] # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + +.set noreorder + b 1332 nop bc1f 1332 @@ -63,6 +67,11 @@ end_of_code: # CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00] # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] # CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] j 1328 @@ -78,3 +87,8 @@ end_of_code: jr $7 nop j $7 + nop + jal $25 + nop + jal $4,$25 + nop |