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authorElena Demikhovsky <elena.demikhovsky@intel.com>2012-12-24 10:03:57 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2012-12-24 10:03:57 +0000
commit94d7ab7da4601d0caa75e7cffcf542214fb830a8 (patch)
tree82251aa7f0faa0b54d26b819abc2600fc9633572
parent4b254679e75566d44adcdad95d6f3dcb837150dd (diff)
Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171026 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/CodeGen/ValueTypes.h127
-rw-r--r--include/llvm/CodeGen/ValueTypes.td66
-rw-r--r--include/llvm/Intrinsics.td8
-rw-r--r--lib/VMCore/ValueTypes.cpp12
-rw-r--r--utils/TableGen/CodeGenTarget.cpp6
5 files changed, 143 insertions, 76 deletions
diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h
index 381bbd3002..f8a6503f23 100644
--- a/include/llvm/CodeGen/ValueTypes.h
+++ b/include/llvm/CodeGen/ValueTypes.h
@@ -64,52 +64,61 @@ namespace llvm {
v4i1 = 14, // 4 x i1
v8i1 = 15, // 8 x i1
v16i1 = 16, // 16 x i1
- v2i8 = 17, // 2 x i8
- v4i8 = 18, // 4 x i8
- v8i8 = 19, // 8 x i8
- v16i8 = 20, // 16 x i8
- v32i8 = 21, // 32 x i8
- v1i16 = 22, // 1 x i16
- v2i16 = 23, // 2 x i16
- v4i16 = 24, // 4 x i16
- v8i16 = 25, // 8 x i16
- v16i16 = 26, // 16 x i16
- v1i32 = 27, // 1 x i32
- v2i32 = 28, // 2 x i32
- v4i32 = 29, // 4 x i32
- v8i32 = 30, // 8 x i32
- v16i32 = 31, // 16 x i32
- v1i64 = 32, // 1 x i64
- v2i64 = 33, // 2 x i64
- v4i64 = 34, // 4 x i64
- v8i64 = 35, // 8 x i64
- v16i64 = 36, // 16 x i64
-
- v2f16 = 37, // 2 x f16
- v2f32 = 38, // 2 x f32
- v4f32 = 39, // 4 x f32
- v8f32 = 40, // 8 x f32
- v2f64 = 41, // 2 x f64
- v4f64 = 42, // 4 x f64
+ v32i1 = 17, // 32 x i1
+ v64i1 = 18, // 64 x i1
+
+ v2i8 = 19, // 2 x i8
+ v4i8 = 20, // 4 x i8
+ v8i8 = 21, // 8 x i8
+ v16i8 = 22, // 16 x i8
+ v32i8 = 23, // 32 x i8
+ v64i8 = 24, // 64 x i8
+ v1i16 = 25, // 1 x i16
+ v2i16 = 26, // 2 x i16
+ v4i16 = 27, // 4 x i16
+ v8i16 = 28, // 8 x i16
+ v16i16 = 29, // 16 x i16
+ v32i16 = 30, // 32 x i16
+ v1i32 = 31, // 1 x i32
+ v2i32 = 32, // 2 x i32
+ v4i32 = 33, // 4 x i32
+ v8i32 = 34, // 8 x i32
+ v16i32 = 35, // 16 x i32
+ v1i64 = 36, // 1 x i64
+ v2i64 = 37, // 2 x i64
+ v4i64 = 38, // 4 x i64
+ v8i64 = 39, // 8 x i64
+ v16i64 = 40, // 16 x i64
- FIRST_VECTOR_VALUETYPE = v2i1,
- LAST_VECTOR_VALUETYPE = v4f64,
FIRST_INTEGER_VECTOR_VALUETYPE = v2i1,
LAST_INTEGER_VECTOR_VALUETYPE = v16i64,
+
+ v2f16 = 41, // 2 x f16
+ v2f32 = 42, // 2 x f32
+ v4f32 = 43, // 4 x f32
+ v8f32 = 44, // 8 x f32
+ v16f32 = 45, // 16 x f32
+ v2f64 = 46, // 2 x f64
+ v4f64 = 47, // 4 x f64
+ v8f64 = 48, // 8 x f64
+
FIRST_FP_VECTOR_VALUETYPE = v2f16,
- LAST_FP_VECTOR_VALUETYPE = v4f64,
+ LAST_FP_VECTOR_VALUETYPE = v8f64,
- x86mmx = 43, // This is an X86 MMX value
+ FIRST_VECTOR_VALUETYPE = v2i1,
+ LAST_VECTOR_VALUETYPE = v8f64,
+
+ x86mmx = 49, // This is an X86 MMX value
- Glue = 44, // This glues nodes together during pre-RA sched
+ Glue = 50, // This glues nodes together during pre-RA sched
- isVoid = 45, // This has no value
+ isVoid = 51, // This has no value
- Untyped = 46, // This value takes a register, but has
+ Untyped = 52, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
- LAST_VALUETYPE = 47, // This always remains at the end of the list.
+ LAST_VALUETYPE = 53, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -213,7 +222,9 @@ namespace llvm {
/// is512BitVector - Return true if this is a 512-bit vector type.
bool is512BitVector() const {
- return (SimpleTy == MVT::v8i64 || SimpleTy == MVT::v16i32);
+ return (SimpleTy == MVT::v8f64 || SimpleTy == MVT::v16f32 ||
+ SimpleTy == MVT::v64i8 || SimpleTy == MVT::v32i16 ||
+ SimpleTy == MVT::v8i64 || SimpleTy == MVT::v16i32);
}
/// is1024BitVector - Return true if this is a 1024-bit vector type.
@@ -251,17 +262,21 @@ namespace llvm {
case v2i1 :
case v4i1 :
case v8i1 :
- case v16i1: return i1;
+ case v16i1 :
+ case v32i1 :
+ case v64i1: return i1;
case v2i8 :
case v4i8 :
case v8i8 :
case v16i8:
- case v32i8: return i8;
+ case v32i8:
+ case v64i8: return i8;
case v1i16:
case v2i16:
case v4i16:
case v8i16:
- case v16i16: return i16;
+ case v16i16:
+ case v32i16: return i16;
case v1i32:
case v2i32:
case v4i32:
@@ -275,9 +290,11 @@ namespace llvm {
case v2f16: return f16;
case v2f32:
case v4f32:
- case v8f32: return f32;
+ case v8f32:
+ case v16f32: return f32;
case v2f64:
- case v4f64: return f64;
+ case v4f64:
+ case v8f64: return f64;
}
}
@@ -285,18 +302,24 @@ namespace llvm {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
- case v32i8: return 32;
+ case v32i1:
+ case v32i8:
+ case v32i16: return 32;
+ case v64i1:
+ case v64i8: return 64;
case v16i1:
case v16i8:
case v16i16:
case v16i32:
- case v16i64:return 16;
- case v8i1:
+ case v16i64:
+ case v16f32: return 16;
+ case v8i1 :
case v8i8 :
case v8i16:
case v8i32:
case v8i64:
- case v8f32: return 8;
+ case v8f32:
+ case v8f64: return 8;
case v4i1:
case v4i8:
case v4i16:
@@ -343,6 +366,7 @@ namespace llvm {
case v1i16: return 16;
case f32 :
case i32 :
+ case v32i1:
case v4i8:
case v2i16:
case v2f16:
@@ -350,6 +374,7 @@ namespace llvm {
case x86mmx:
case f64 :
case i64 :
+ case v64i1:
case v8i8:
case v4i16:
case v2i32:
@@ -371,8 +396,12 @@ namespace llvm {
case v4i64:
case v8f32:
case v4f64: return 256;
+ case v64i8:
+ case v32i16:
case v16i32:
- case v8i64: return 512;
+ case v8i64:
+ case v16f32:
+ case v8f64: return 512;
case v16i64:return 1024;
}
}
@@ -455,6 +484,8 @@ namespace llvm {
if (NumElements == 4) return MVT::v4i1;
if (NumElements == 8) return MVT::v8i1;
if (NumElements == 16) return MVT::v16i1;
+ if (NumElements == 32) return MVT::v32i1;
+ if (NumElements == 64) return MVT::v64i1;
break;
case MVT::i8:
if (NumElements == 2) return MVT::v2i8;
@@ -462,6 +493,7 @@ namespace llvm {
if (NumElements == 8) return MVT::v8i8;
if (NumElements == 16) return MVT::v16i8;
if (NumElements == 32) return MVT::v32i8;
+ if (NumElements == 64) return MVT::v64i8;
break;
case MVT::i16:
if (NumElements == 1) return MVT::v1i16;
@@ -469,6 +501,7 @@ namespace llvm {
if (NumElements == 4) return MVT::v4i16;
if (NumElements == 8) return MVT::v8i16;
if (NumElements == 16) return MVT::v16i16;
+ if (NumElements == 32) return MVT::v32i16;
break;
case MVT::i32:
if (NumElements == 1) return MVT::v1i32;
@@ -491,10 +524,12 @@ namespace llvm {
if (NumElements == 2) return MVT::v2f32;
if (NumElements == 4) return MVT::v4f32;
if (NumElements == 8) return MVT::v8f32;
+ if (NumElements == 16) return MVT::v16f32;
break;
case MVT::f64:
if (NumElements == 2) return MVT::v2f64;
if (NumElements == 4) return MVT::v4f64;
+ if (NumElements == 8) return MVT::v8f64;
break;
}
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td
index a707f887aa..76df6ac8e6 100644
--- a/include/llvm/CodeGen/ValueTypes.td
+++ b/include/llvm/CodeGen/ValueTypes.td
@@ -37,39 +37,45 @@ def v2i1 : ValueType<2 , 13>; // 2 x i1 vector value
def v4i1 : ValueType<4 , 14>; // 4 x i1 vector value
def v8i1 : ValueType<8 , 15>; // 8 x i1 vector value
def v16i1 : ValueType<16, 16>; // 16 x i1 vector value
-def v2i8 : ValueType<16 , 17>; // 2 x i8 vector value
-def v4i8 : ValueType<32 , 18>; // 4 x i8 vector value
-def v8i8 : ValueType<64 , 19>; // 8 x i8 vector value
-def v16i8 : ValueType<128, 20>; // 16 x i8 vector value
-def v32i8 : ValueType<256, 21>; // 32 x i8 vector value
-def v1i16 : ValueType<16 , 22>; // 1 x i16 vector value
-def v2i16 : ValueType<32 , 23>; // 2 x i16 vector value
-def v4i16 : ValueType<64 , 24>; // 4 x i16 vector value
-def v8i16 : ValueType<128, 25>; // 8 x i16 vector value
-def v16i16 : ValueType<256, 26>; // 16 x i16 vector value
-def v1i32 : ValueType<32 , 27>; // 1 x i32 vector value
-def v2i32 : ValueType<64 , 28>; // 2 x i32 vector value
-def v4i32 : ValueType<128, 29>; // 4 x i32 vector value
-def v8i32 : ValueType<256, 30>; // 8 x i32 vector value
-def v16i32 : ValueType<512, 31>; // 16 x i32 vector value
-def v1i64 : ValueType<64 , 32>; // 1 x i64 vector value
-def v2i64 : ValueType<128, 33>; // 2 x i64 vector value
-def v4i64 : ValueType<256, 34>; // 4 x i64 vector value
-def v8i64 : ValueType<512, 35>; // 8 x i64 vector value
-def v16i64 : ValueType<1024,36>; // 16 x i64 vector value
+def v32i1 : ValueType<32 , 17>; // 32 x i1 vector value
+def v64i1 : ValueType<64 , 18>; // 64 x i1 vector value
+def v2i8 : ValueType<16 , 19>; // 2 x i8 vector value
+def v4i8 : ValueType<32 , 20>; // 4 x i8 vector value
+def v8i8 : ValueType<64 , 21>; // 8 x i8 vector value
+def v16i8 : ValueType<128, 22>; // 16 x i8 vector value
+def v32i8 : ValueType<256, 23>; // 32 x i8 vector value
+def v64i8 : ValueType<256, 24>; // 64 x i8 vector value
+def v1i16 : ValueType<16 , 25>; // 1 x i16 vector value
+def v2i16 : ValueType<32 , 26>; // 2 x i16 vector value
+def v4i16 : ValueType<64 , 27>; // 4 x i16 vector value
+def v8i16 : ValueType<128, 28>; // 8 x i16 vector value
+def v16i16 : ValueType<256, 29>; // 16 x i16 vector value
+def v32i16 : ValueType<256, 30>; // 32 x i16 vector value
+def v1i32 : ValueType<32 , 31>; // 1 x i32 vector value
+def v2i32 : ValueType<64 , 32>; // 2 x i32 vector value
+def v4i32 : ValueType<128, 33>; // 4 x i32 vector value
+def v8i32 : ValueType<256, 34>; // 8 x i32 vector value
+def v16i32 : ValueType<512, 35>; // 16 x i32 vector value
+def v1i64 : ValueType<64 , 36>; // 1 x i64 vector value
+def v2i64 : ValueType<128, 37>; // 2 x i64 vector value
+def v4i64 : ValueType<256, 38>; // 4 x i64 vector value
+def v8i64 : ValueType<512, 39>; // 8 x i64 vector value
+def v16i64 : ValueType<1024,40>; // 16 x i64 vector value
-def v2f16 : ValueType<32 , 37>; // 2 x f16 vector value
-def v2f32 : ValueType<64 , 38>; // 2 x f32 vector value
-def v4f32 : ValueType<128, 39>; // 4 x f32 vector value
-def v8f32 : ValueType<256, 40>; // 8 x f32 vector value
-def v2f64 : ValueType<128, 41>; // 2 x f64 vector value
-def v4f64 : ValueType<256, 42>; // 4 x f64 vector value
+def v2f16 : ValueType<32 , 41>; // 2 x f16 vector value
+def v2f32 : ValueType<64 , 42>; // 2 x f32 vector value
+def v4f32 : ValueType<128, 43>; // 4 x f32 vector value
+def v8f32 : ValueType<256, 44>; // 8 x f32 vector value
+def v16f32 : ValueType<512, 45>; // 16 x f32 vector value
+def v2f64 : ValueType<128, 46>; // 2 x f64 vector value
+def v4f64 : ValueType<256, 47>; // 4 x f64 vector value
+def v8f64 : ValueType<512, 48>; // 8 x f64 vector value
-def x86mmx : ValueType<64 , 43>; // X86 MMX value
-def FlagVT : ValueType<0 , 44>; // Pre-RA sched glue
-def isVoid : ValueType<0 , 45>; // Produces no value
-def untyped: ValueType<8 , 46>; // Produces an untyped value
+def x86mmx : ValueType<64 , 49>; // X86 MMX value
+def FlagVT : ValueType<0 , 50>; // Pre-RA sched glue
+def isVoid : ValueType<0 , 51>; // Produces no value
+def untyped: ValueType<8 , 52>; // Produces an untyped value
def MetadataVT: ValueType<0, 250>; // Metadata
// Pseudo valuetype mapped to the current pointer size to any address space.
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index d5c01ccbf3..e05d26917c 100644
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -125,16 +125,22 @@ def llvm_v2i1_ty : LLVMType<v2i1>; // 2 x i1
def llvm_v4i1_ty : LLVMType<v4i1>; // 4 x i1
def llvm_v8i1_ty : LLVMType<v8i1>; // 8 x i1
def llvm_v16i1_ty : LLVMType<v16i1>; // 16 x i1
+def llvm_v32i1_ty : LLVMType<v32i1>; // 32 x i1
+def llvm_v64i1_ty : LLVMType<v64i1>; // 64 x i1
def llvm_v2i8_ty : LLVMType<v2i8>; // 2 x i8
def llvm_v4i8_ty : LLVMType<v4i8>; // 4 x i8
def llvm_v8i8_ty : LLVMType<v8i8>; // 8 x i8
def llvm_v16i8_ty : LLVMType<v16i8>; // 16 x i8
def llvm_v32i8_ty : LLVMType<v32i8>; // 32 x i8
+def llvm_v64i8_ty : LLVMType<v64i8>; // 64 x i8
+
def llvm_v1i16_ty : LLVMType<v1i16>; // 1 x i16
def llvm_v2i16_ty : LLVMType<v2i16>; // 2 x i16
def llvm_v4i16_ty : LLVMType<v4i16>; // 4 x i16
def llvm_v8i16_ty : LLVMType<v8i16>; // 8 x i16
def llvm_v16i16_ty : LLVMType<v16i16>; // 16 x i16
+def llvm_v32i16_ty : LLVMType<v32i16>; // 32 x i16
+
def llvm_v1i32_ty : LLVMType<v1i32>; // 1 x i32
def llvm_v2i32_ty : LLVMType<v2i32>; // 2 x i32
def llvm_v4i32_ty : LLVMType<v4i32>; // 4 x i32
@@ -149,8 +155,10 @@ def llvm_v16i64_ty : LLVMType<v16i64>; // 16 x i64
def llvm_v2f32_ty : LLVMType<v2f32>; // 2 x float
def llvm_v4f32_ty : LLVMType<v4f32>; // 4 x float
def llvm_v8f32_ty : LLVMType<v8f32>; // 8 x float
+def llvm_v16f32_ty : LLVMType<v16f32>; // 16 x float
def llvm_v2f64_ty : LLVMType<v2f64>; // 2 x double
def llvm_v4f64_ty : LLVMType<v4f64>; // 4 x double
+def llvm_v8f64_ty : LLVMType<v8f64>; // 8 x double
def llvm_vararg_ty : LLVMType<isVoid>; // this means vararg here
diff --git a/lib/VMCore/ValueTypes.cpp b/lib/VMCore/ValueTypes.cpp
index 3c373b1b38..72d248c7c9 100644
--- a/lib/VMCore/ValueTypes.cpp
+++ b/lib/VMCore/ValueTypes.cpp
@@ -132,16 +132,20 @@ std::string EVT::getEVTString() const {
case MVT::v4i1: return "v4i1";
case MVT::v8i1: return "v8i1";
case MVT::v16i1: return "v16i1";
+ case MVT::v32i1: return "v32i1";
+ case MVT::v64i1: return "v64i1";
case MVT::v2i8: return "v2i8";
case MVT::v4i8: return "v4i8";
case MVT::v8i8: return "v8i8";
case MVT::v16i8: return "v16i8";
case MVT::v32i8: return "v32i8";
+ case MVT::v64i8: return "v64i8";
case MVT::v1i16: return "v1i16";
case MVT::v2i16: return "v2i16";
case MVT::v4i16: return "v4i16";
case MVT::v8i16: return "v8i16";
case MVT::v16i16: return "v16i16";
+ case MVT::v32i16: return "v32i16";
case MVT::v1i32: return "v1i32";
case MVT::v2i32: return "v2i32";
case MVT::v4i32: return "v4i32";
@@ -156,8 +160,10 @@ std::string EVT::getEVTString() const {
case MVT::v2f16: return "v2f16";
case MVT::v4f32: return "v4f32";
case MVT::v8f32: return "v8f32";
+ case MVT::v16f32: return "v16f32";
case MVT::v2f64: return "v2f64";
case MVT::v4f64: return "v4f64";
+ case MVT::v8f64: return "v8f64";
case MVT::Metadata:return "Metadata";
case MVT::Untyped: return "Untyped";
}
@@ -189,16 +195,20 @@ Type *EVT::getTypeForEVT(LLVMContext &Context) const {
case MVT::v4i1: return VectorType::get(Type::getInt1Ty(Context), 4);
case MVT::v8i1: return VectorType::get(Type::getInt1Ty(Context), 8);
case MVT::v16i1: return VectorType::get(Type::getInt1Ty(Context), 16);
+ case MVT::v32i1: return VectorType::get(Type::getInt1Ty(Context), 32);
+ case MVT::v64i1: return VectorType::get(Type::getInt1Ty(Context), 64);
case MVT::v2i8: return VectorType::get(Type::getInt8Ty(Context), 2);
case MVT::v4i8: return VectorType::get(Type::getInt8Ty(Context), 4);
case MVT::v8i8: return VectorType::get(Type::getInt8Ty(Context), 8);
case MVT::v16i8: return VectorType::get(Type::getInt8Ty(Context), 16);
case MVT::v32i8: return VectorType::get(Type::getInt8Ty(Context), 32);
+ case MVT::v64i8: return VectorType::get(Type::getInt8Ty(Context), 64);
case MVT::v1i16: return VectorType::get(Type::getInt16Ty(Context), 1);
case MVT::v2i16: return VectorType::get(Type::getInt16Ty(Context), 2);
case MVT::v4i16: return VectorType::get(Type::getInt16Ty(Context), 4);
case MVT::v8i16: return VectorType::get(Type::getInt16Ty(Context), 8);
case MVT::v16i16: return VectorType::get(Type::getInt16Ty(Context), 16);
+ case MVT::v32i16: return VectorType::get(Type::getInt16Ty(Context), 32);
case MVT::v1i32: return VectorType::get(Type::getInt32Ty(Context), 1);
case MVT::v2i32: return VectorType::get(Type::getInt32Ty(Context), 2);
case MVT::v4i32: return VectorType::get(Type::getInt32Ty(Context), 4);
@@ -213,8 +223,10 @@ Type *EVT::getTypeForEVT(LLVMContext &Context) const {
case MVT::v2f32: return VectorType::get(Type::getFloatTy(Context), 2);
case MVT::v4f32: return VectorType::get(Type::getFloatTy(Context), 4);
case MVT::v8f32: return VectorType::get(Type::getFloatTy(Context), 8);
+ case MVT::v16f32: return VectorType::get(Type::getFloatTy(Context), 16);
case MVT::v2f64: return VectorType::get(Type::getDoubleTy(Context), 2);
case MVT::v4f64: return VectorType::get(Type::getDoubleTy(Context), 4);
+ case MVT::v8f64: return VectorType::get(Type::getDoubleTy(Context), 8);
case MVT::Metadata: return Type::getMetadataTy(Context);
}
}
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index d946d035c0..dd3f6e29fd 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -73,16 +73,20 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::v4i1: return "MVT::v4i1";
case MVT::v8i1: return "MVT::v8i1";
case MVT::v16i1: return "MVT::v16i1";
+ case MVT::v32i1: return "MVT::v32i1";
+ case MVT::v64i1: return "MVT::v64i1";
case MVT::v2i8: return "MVT::v2i8";
case MVT::v4i8: return "MVT::v4i8";
case MVT::v8i8: return "MVT::v8i8";
case MVT::v16i8: return "MVT::v16i8";
case MVT::v32i8: return "MVT::v32i8";
+ case MVT::v64i8: return "MVT::v64i8";
case MVT::v1i16: return "MVT::v1i16";
case MVT::v2i16: return "MVT::v2i16";
case MVT::v4i16: return "MVT::v4i16";
case MVT::v8i16: return "MVT::v8i16";
case MVT::v16i16: return "MVT::v16i16";
+ case MVT::v32i16: return "MVT::v32i16";
case MVT::v1i32: return "MVT::v1i32";
case MVT::v2i32: return "MVT::v2i32";
case MVT::v4i32: return "MVT::v4i32";
@@ -97,8 +101,10 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::v2f32: return "MVT::v2f32";
case MVT::v4f32: return "MVT::v4f32";
case MVT::v8f32: return "MVT::v8f32";
+ case MVT::v16f32: return "MVT::v16f32";
case MVT::v2f64: return "MVT::v2f64";
case MVT::v4f64: return "MVT::v4f64";
+ case MVT::v8f64: return "MVT::v8f64";
case MVT::Metadata: return "MVT::Metadata";
case MVT::iPTR: return "MVT::iPTR";
case MVT::iPTRAny: return "MVT::iPTRAny";