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| author | Jim Grosbach <grosbach@apple.com> | 2010-12-23 23:19:54 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-12-23 23:19:54 +0000 |
| commit | 940c8e5494c17529f96f5e1915ad89e488bdd69e (patch) | |
| tree | 032b4590d5961bc214b85ca7245968f42005e377 | |
| parent | 3c904694fc769ce9e12455b43b94144a99325110 (diff) | |
Recognize a few more documented register name aliases for ARM in the asm lexer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122523 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmLexer.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp b/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp index e79a332f7e..c93fb248e7 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp @@ -121,6 +121,24 @@ AsmToken ARMBaseAsmLexer::LexTokenUAL() { StringRef lowerRef(lowerCase); unsigned regID = MatchRegisterName(lowerRef); + // Check for register aliases. + // r13 -> sp + // r14 -> lr + // r15 -> pc + // ip -> r12 + // FIXME: Some assemblers support lots of others. Do we want them all? + if (!regID) { + if (lowerCase.size() == 3 && lowerCase[0] == 'r' + && lowerCase[1] == '1') { + switch (lowerCase[2]) { + default: break; + case '3': regID = ARM::SP; + case '4': regID = ARM::LR; + case '5': regID = ARM::PC; + } + } else if (lowerCase == "ip") + regID = ARM::R12; + } if (regID) { return AsmToken(AsmToken::Register, |