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authorTanya Lattner <tonic@nondot.org>2008-01-21 20:47:24 +0000
committerTanya Lattner <tonic@nondot.org>2008-01-21 20:47:24 +0000
commit923aaa078a8f150df3ac27a9ea94ed5d8ea2c42f (patch)
tree7c8008024ea94fa10807e8a9669a3a962d06e638
parent6bd6920799c7215b51795e5a873b69ab02d732ae (diff)
Merge from mainline.
Need to handle any 'nest' parameter before integer parameters, since otherwise it won't be passed in the right register. With this change trampolines work on x86-64 (thanks to Luke Guest for providing access to an x86-64 box). git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_22@46215 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86CallingConv.td16
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td
index 24a50de829..1bfd021b36 100644
--- a/lib/Target/X86/X86CallingConv.td
+++ b/lib/Target/X86/X86CallingConv.td
@@ -101,7 +101,10 @@ def CC_X86_64_C : CallingConv<[
// Promote i8/i16 arguments to i32.
CCIfType<[i8, i16], CCPromoteToType<i32>>,
-
+
+ // The 'nest' parameter, if any, is passed in R10.
+ CCIfNest<CCAssignToReg<[R10]>>,
+
// The first 6 integer arguments are passed in integer registers.
CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
@@ -114,9 +117,6 @@ def CC_X86_64_C : CallingConv<[
CCIfType<[v8i8, v4i16, v2i32, v1i64],
CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
- // The 'nest' parameter, if any, is passed in R10.
- CCIfNest<CCAssignToReg<[R10]>>,
-
// Integer/FP values get stored in stack slots that are 8 bytes in size and
// 8-byte aligned if there are no more registers to hold them.
CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
@@ -140,7 +140,10 @@ def CC_X86_64_TailCall : CallingConv<[
// Promote i8/i16 arguments to i32.
CCIfType<[i8, i16], CCPromoteToType<i32>>,
-
+
+ // The 'nest' parameter, if any, is passed in R10.
+ CCIfNest<CCAssignToReg<[R10]>>,
+
// The first 6 integer arguments are passed in integer registers.
CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D]>>,
CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
@@ -153,9 +156,6 @@ def CC_X86_64_TailCall : CallingConv<[
CCIfType<[v8i8, v4i16, v2i32, v1i64],
CCAssignToReg<[RDI, RSI, RDX, RCX, R8]>>,
- // The 'nest' parameter, if any, is passed in R10.
- CCIfNest<CCAssignToReg<[R10]>>,
-
// Integer/FP values get stored in stack slots that are 8 bytes in size and
// 8-byte aligned if there are no more registers to hold them.
CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,