aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorNick Lewycky <nicholas@mxc.ca>2008-08-17 19:58:24 +0000
committerNick Lewycky <nicholas@mxc.ca>2008-08-17 19:58:24 +0000
commit91a0f782650b6fb22984501f844f85b7091785f7 (patch)
treeb7b53eddf5767164f324c83261b628d6aabc2bec
parentb20d685c6f8b2e604d7c13a9110ea5d3c639e11c (diff)
Consider the case where xor by -1 and xor by 128 have been combined already to
produce an xor by 127. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54906 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/InstructionCombining.cpp24
-rw-r--r--test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll19
2 files changed, 42 insertions, 1 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 32232a6588..defad26f8a 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -5503,8 +5503,8 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
return new ICmpInst(I.getPredicate(), Op0I->getOperand(0),
Op1I->getOperand(0));
} else {
- // icmp u/s (a ^ signbit), (b ^ signbit) --> icmp s/u a, b
if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
+ // icmp u/s (a ^ signbit), (b ^ signbit) --> icmp s/u a, b
if (CI->getValue().isSignBit()) {
ICmpInst::Predicate Pred = I.isSignedPredicate()
? I.getUnsignedPredicate()
@@ -5512,6 +5512,17 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
return new ICmpInst(Pred, Op0I->getOperand(0),
Op1I->getOperand(0));
}
+
+ // icmp u/s (a ^ ~signbit), (b ^ ~signbit) --> icmp s/u b, a
+ if ((~CI->getValue()).isSignBit()) {
+ ICmpInst::Predicate Pred = I.isSignedPredicate()
+ ? I.getUnsignedPredicate()
+ : I.getSignedPredicate();
+ Pred = I.getSwappedPredicate(Pred);
+ return new ICmpInst(Pred, Op0I->getOperand(0),
+ Op1I->getOperand(0));
+
+ }
}
}
break;
@@ -5818,6 +5829,17 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
return new ICmpInst(Pred, LHSI->getOperand(0),
ConstantInt::get(RHSV ^ SignBit));
}
+
+ // (icmp u/s (xor A ~SignBit), C) -> (icmp ~s/u A, (xor C ~SignBit))
+ if (!ICI.isEquality() && (~XorCST->getValue()).isSignBit()) {
+ const APInt &NotSignBit = XorCST->getValue();
+ ICmpInst::Predicate Pred = ICI.isSignedPredicate()
+ ? ICI.getUnsignedPredicate()
+ : ICI.getSignedPredicate();
+ Pred = ICI.getSwappedPredicate(Pred);
+ return new ICmpInst(Pred, LHSI->getOperand(0),
+ ConstantInt::get(RHSV ^ NotSignBit));
+ }
}
break;
case Instruction::And: // (icmp pred (and X, AndCST), RHS)
diff --git a/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll b/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
index 68ed3276e8..91264361d2 100644
--- a/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
+++ b/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
@@ -20,3 +20,22 @@ define i1 @test3(i8 %x) {
ret i1 %tmp
}
+define i1 @test4(i8 %x, i8 %y) {
+ %X = xor i8 %x, 127
+ %Y = xor i8 %y, 127
+ %tmp = icmp slt i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test5(i8 %x, i8 %y) {
+ %X = xor i8 %x, 127
+ %Y = xor i8 %y, 127
+ %tmp = icmp ult i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test6(i8 %x) {
+ %X = xor i8 %x, 127
+ %tmp = icmp uge i8 %X, 15
+ ret i1 %tmp
+}