diff options
author | Chris Lattner <sabre@nondot.org> | 2008-01-04 05:04:53 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2008-01-04 05:04:53 +0000 |
commit | 9027b3cc7f79a67ecf75640c0e25a73dc61d62cf (patch) | |
tree | de9be4368bf91536b79b255865f43a655b46ddf5 | |
parent | 331bf92fb51f058672144681b3d0e67d30f5699f (diff) |
Fix PR1896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45568 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Transforms/IPO/GlobalOpt.cpp | 2 | ||||
-rw-r--r-- | test/Transforms/GlobalOpt/2008-01-03-Crash.ll | 26 |
2 files changed, 27 insertions, 1 deletions
diff --git a/lib/Transforms/IPO/GlobalOpt.cpp b/lib/Transforms/IPO/GlobalOpt.cpp index 2e2648ff06..c3c0530bb1 100644 --- a/lib/Transforms/IPO/GlobalOpt.cpp +++ b/lib/Transforms/IPO/GlobalOpt.cpp @@ -640,7 +640,7 @@ static bool OptimizeAwayTrappingUsesOfLoads(GlobalVariable *GV, Constant *LV) { // If we get here we could have stores, selects, or phi nodes whose values // are loaded. assert((isa<StoreInst>(*GUI) || isa<PHINode>(*GUI) || - isa<SelectInst>(*GUI)) && + isa<SelectInst>(*GUI) || isa<ConstantExpr>(*GUI)) && "Only expect load and stores!"); } diff --git a/test/Transforms/GlobalOpt/2008-01-03-Crash.ll b/test/Transforms/GlobalOpt/2008-01-03-Crash.ll new file mode 100644 index 0000000000..3d8c77db4f --- /dev/null +++ b/test/Transforms/GlobalOpt/2008-01-03-Crash.ll @@ -0,0 +1,26 @@ +; RUN: llvm-as < %s | opt -globalopt | llvm-dis +; PR1896 + +@indirect1 = internal global void (i32)* null ; <void (i32)**> [#uses=2] + +declare void @indirectmarked(i32) + +define i32 @main() { +entry: + br i1 false, label %cond_next20.i, label %cond_true.i9 + +cond_true.i9: ; preds = %entry + ret i32 0 + +cond_next20.i: ; preds = %entry + store void (i32)* @indirectmarked, void (i32)** @indirect1, align 4 + br i1 false, label %cond_next21.i.i23.i, label %stack_restore + +stack_restore: ; preds = %cond_next20.i + ret i32 0 + +cond_next21.i.i23.i: ; preds = %cond_next20.i + %tmp6.i4.i = load i32* bitcast (void (i32)** @indirect1 to i32*), align 4 ; <i32> [#uses=0] + ret i32 0 +} + |