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| author | Bill Wendling <isanbard@gmail.com> | 2010-11-10 01:07:54 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-10 01:07:54 +0000 |
| commit | 8ea974039a8811ff83ad2c45ec1037ac78e5afab (patch) | |
| tree | 683c0ef6c95db60bc4b1847069b38981bc0e1dbe | |
| parent | b80e973c95034e5754d888140497a9658a7c1ded (diff) | |
Emit a '!' if this is a "writeback" register or memory address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118662 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 65f0ad4bb5..e00ced265e 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -382,10 +382,10 @@ void ARMOperand::dump(raw_ostream &OS) const { getImm()->print(OS); break; case Memory: - OS << "<memory>"; + OS << "<memory" << (!Mem.Writeback ? ">" : "!>"); break; case Register: - OS << "<register " << getReg() << ">"; + OS << "<register " << getReg() << (!Reg.Writeback ? ">" : "!>"); break; case RegisterList: { OS << "<register_list "; |