diff options
| author | Bill Wendling <isanbard@gmail.com> | 2010-11-30 00:08:20 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-30 00:08:20 +0000 |
| commit | 8ca2fd6665dd9ba5d527fb4c78de4861842e2411 (patch) | |
| tree | 4dd2cadd90b70b7f5fbfec6d1e34d472df7a0d20 | |
| parent | 194271a76e5b41ed2765449abf55ff85e092da68 (diff) | |
Predicate encoding should be withing {}s. And general cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120361 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 8 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 4 |
2 files changed, 4 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index d2407c6b3c..92b7129227 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1177,19 +1177,17 @@ def PICSTRB : ARMPseudoInst<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p), // LEApcrel - Load a pc-relative address into a register without offending the // assembler. -let neverHasSideEffects = 1 in { -let isReMaterializable = 1 in +let neverHasSideEffects = 1, isReMaterializable = 1 in // FIXME: We want one cannonical LEApcrel instruction and to express one or // both of these as pseudo-instructions that get expanded to it. def LEApcrel : AXI1<0, (outs GPR:$Rd), (ins i32imm:$label, pred:$p), MiscFrm, IIC_iALUi, - "adr$p\t$Rd, #$label", []>; + "adr${p}\t$Rd, #$label", []>; -} // neverHasSideEffects def LEApcrelJT : AXI1<0b0100, (outs GPR:$Rd), (ins i32imm:$label, nohash_imm:$id, pred:$p), MiscFrm, IIC_iALUi, - "adr$p\t$Rd, #${label}_${id}", []> { + "adr${p}\t$Rd, #${label}_${id}", []> { bits<4> p; bits<4> Rd; let Inst{31-28} = p; diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 9ae8a2bd97..4a2a199a3b 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -1240,13 +1240,11 @@ def tMOVCCi : T1pIt<(outs tGPR:$dst), (ins tGPR:$lhs, i32imm:$rhs), IIC_iCMOVi, // tLEApcrel - Load a pc-relative address into a register without offending the // assembler. -let neverHasSideEffects = 1 in { -let isReMaterializable = 1 in +let neverHasSideEffects = 1, isReMaterializable = 1 in def tLEApcrel : T1I<(outs tGPR:$dst), (ins i32imm:$label, pred:$p), IIC_iALUi, "adr${p}\t$dst, #$label", []>, T1Encoding<{1,0,1,0,0,?}>; // A6.2 & A8.6.10 -} // neverHasSideEffects def tLEApcrelJT : T1I<(outs tGPR:$dst), (ins i32imm:$label, nohash_imm:$id, pred:$p), IIC_iALUi, "adr${p}\t$dst, #${label}_${id}", []>, |