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authorReid Spencer <rspencer@reidspencer.com>2004-10-22 21:02:08 +0000
committerReid Spencer <rspencer@reidspencer.com>2004-10-22 21:02:08 +0000
commit8c2c3152d64aafe24b5b67cd7d670658eb65df18 (patch)
treedc32473730cf8b02d1e11eabbfe86a4b963823e3
parent4d71b6611e9281c999f34712bfd014cc3c95ef3f (diff)
Adjust to changes in Makefile.rules
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/Makefile40
-rw-r--r--lib/Target/PowerPC/PPC32ISelSimple.cpp2
-rw-r--r--lib/Target/Skeleton/Makefile34
-rw-r--r--lib/Target/SparcV9/Makefile45
-rw-r--r--lib/Target/X86/Makefile48
-rw-r--r--projects/Makefile2
-rw-r--r--projects/Stacker/lib/compiler/Makefile2
-rw-r--r--projects/sample/tools/sample/Makefile2
-rw-r--r--runtime/GC/SemiSpace/Makefile4
-rw-r--r--runtime/GCCLibraries/crtend/Makefile33
-rw-r--r--runtime/GCCLibraries/libc/Makefile1
-rw-r--r--utils/Burg/Makefile2
12 files changed, 48 insertions, 167 deletions
diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile
index e76bc3b286..f06567bbaa 100644
--- a/lib/Target/PowerPC/Makefile
+++ b/lib/Target/PowerPC/Makefile
@@ -8,45 +8,13 @@
##===----------------------------------------------------------------------===##
LEVEL = ../../..
LIBRARYNAME = powerpc
-include $(LEVEL)/Makefile.common
-
TARGET = PowerPC
+
# Make sure that tblgen is run, first thing.
-$(SourceDepend): PowerPCGenInstrNames.inc PowerPCGenRegisterNames.inc \
- PowerPCGenAsmWriter.inc PPC32GenCodeEmitter.inc \
+BUILT_SOURCES = PowerPCGenInstrNames.inc PowerPCGenRegisterNames.inc \
+ PowerPCGenAsmWriter.inc PPC32GenCodeEmitter.inc \
PPC32GenRegisterInfo.h.inc PPC32GenRegisterInfo.inc PPC32GenInstrInfo.inc \
PPC64GenRegisterInfo.h.inc PPC64GenRegisterInfo.inc PPC64GenInstrInfo.inc
-TDFILES = $(wildcard $(SourceDir)/*.td) $(SourceDir)/../Target.td
-
-%GenRegisterNames.inc:: PPC32.td $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET) register names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
-
-%GenRegisterInfo.h.inc:: %.td $(TDFILES) $(TBLGEN)
- @echo "Building `basename $<` register information header with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
-
-%GenRegisterInfo.inc:: %.td $(TDFILES) $(TBLGEN)
- @echo "Building `basename $<` register information implementation with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
-
-$(TARGET)GenInstrNames.inc:: PPC32.td $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET) instruction names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
-
-%GenInstrInfo.inc:: %.td $(TDFILES) $(TBLGEN)
- @echo "Building `basename $<` instruction information with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
-
-%GenCodeEmitter.inc:: %.td $(TDFILES) $(TBLGEN)
- @echo "Building `basename $<` code emitter with tblgen"
- $(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@
-
-$(TARGET)GenAsmWriter.inc:: $(TARGET).td $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td assembly writer with tblgen"
- $(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-asm-writer -o $@
-
-clean::
- $(VERB) rm -f *.inc
+include $(LEVEL)/Makefile.common
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 3adce5d83d..44d307d118 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -2144,7 +2144,7 @@ bool PPC32ISel::emitBitfieldInsert(BinaryOperator *AndI, unsigned ShlAmount,
if (CI_1 && OrI && OrI->getOpcode() == Instruction::Or) {
Value *Op0 = OrI->getOperand(0);
Value *Op1 = OrI->getOperand(1);
- BinaryOperator *AndI_2;
+ BinaryOperator *AndI_2 = 0;
// Whichever operand our initial And instruction is to the Or instruction,
// Look at the other operand to determine if it is also an And instruction
if (AndI == Op0) {
diff --git a/lib/Target/Skeleton/Makefile b/lib/Target/Skeleton/Makefile
index 725dcbad13..bc9a16ddfd 100644
--- a/lib/Target/Skeleton/Makefile
+++ b/lib/Target/Skeleton/Makefile
@@ -9,37 +9,11 @@
LEVEL = ../../..
LIBRARYNAME = skeleton
-include $(LEVEL)/Makefile.common
TARGET = Skeleton
-TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
- $(SourceDir)/../Target.td
-
-
# Make sure that tblgen is run, first thing.
-$(SourceDepend): $(TARGET)GenRegisterInfo.h.inc $(TARGET)GenRegisterNames.inc \
- $(TARGET)GenRegisterInfo.inc $(TARGET)GenInstrNames.inc \
- $(TARGET)GenInstrInfo.inc
-
-$(TARGET)GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
-
-$(TARGET)GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register information header with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+BUILT_SOURCES = $(TARGET)GenRegisterInfo.h.inc $(TARGET)GenRegisterNames.inc \
+ $(TARGET)GenRegisterInfo.inc $(TARGET)GenInstrNames.inc \
+ $(TARGET)GenInstrInfo.inc
-$(TARGET)GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register information implementation with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
-
-$(TARGET)GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
-
-$(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction information with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
-
-clean::
- $(VERB) rm -f *.inc
+include $(LEVEL)/Makefile.common
diff --git a/lib/Target/SparcV9/Makefile b/lib/Target/SparcV9/Makefile
index 4226ddc09d..788a88a7e4 100644
--- a/lib/Target/SparcV9/Makefile
+++ b/lib/Target/SparcV9/Makefile
@@ -10,48 +10,27 @@ LEVEL = ../../..
LIBRARYNAME = sparcv9
PARALLEL_DIRS = InstrSched LiveVar ModuloScheduling RegAlloc
-ExtraSource = SparcV9.burm.cpp
+BUILT_SOURCES = \
+ SparcV9CodeEmitter.inc \
+ SparcV9.burm.cpp
include $(LEVEL)/Makefile.common
-ifdef ENABLE_OPTIMIZED
- DEBUG_FLAG =
-else
- DEBUG_FLAG = -D_DEBUG
-endif
+SparcV9.burg.in1 : $(BUILD_SRC_DIR)/SparcV9.burg.in
+ $(CXX) -E $(CPPFLAGS) -x c++ $< | $(SED) '/^#/d' | $(SED) 's/Ydefine/#define/' > $@
-SparcV9.burg.in1 : $(SourceDir)/SparcV9.burg.in
- $(CXX) -E -I$(LLVM_SRC_ROOT)/include $(DEBUG_FLAG) -x c++ $< | $(SED) '/^#/d' | $(SED) 's/Ydefine/#define/' > $@
-
-SparcV9.burm : SparcV9.burg.in1 $(LLVM_SRC_ROOT)/include/llvm/Instruction.def
- $(CXX) -E -I$(LLVM_SRC_ROOT)/include $(DEBUG_FLAG) -x c++ $< | $(SED) '/^#/d' | $(SED) 's/^Xinclude/#include/' | $(SED) 's/^Xdefine/#define/' > $@
+SparcV9.burm : SparcV9.burg.in1
+ $(CXX) -E $(CPPFLAGS) -x c++ $< | $(SED) '/^#/d' | $(SED) 's/^Xinclude/#include/' | $(SED) 's/^Xdefine/#define/' > $@
SparcV9.burm.cpp: SparcV9.burm
@echo "Burging `basename $<`"
- $(RunBurg) $< -o $@
-
-$(BUILD_OBJ_DIR)/Debug/SparcV9.burm.lo: SparcV9.burm.cpp
- $(CompileG) $< -o $@
-
-$(BUILD_OBJ_DIR)/Release/SparcV9.burm.lo: SparcV9.burm.cpp
- $(CompileO) $< -o $@
-
-$(BUILD_OBJ_DIR)/Profile/SparcV9.burm.lo: SparcV9.burm.cpp
- $(CompileP) $< -o $@
-
-$(BUILD_OBJ_DIR)/Depend/SparcV9.burm.d: $(BUILD_OBJ_DIR)/Depend/.dir
- touch $@
-
-TABLEGEN_FILES := $(notdir $(wildcard $(SourceDir)/*.td))
-
-# Make sure that tblgen is run, first thing.
-$(SourceDepend): SparcV9CodeEmitter.inc
+ $(BURG) -I $< -o $@
-SparcV9CodeEmitter.cpp:: SparcV9CodeEmitter.inc
+TABLEGEN_FILES := $(notdir $(wildcard $(BUILD_SRC_DIR)/*.td))
-SparcV9CodeEmitter.inc:: $(SourceDir)/SparcV9.td $(TABLEGEN_FILES) $(TBLGEN)
- @echo "Tblgen'ing `basename $<`"
- $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@
+SparcV9CodeEmitter.inc: $(BUILD_SRC_DIR)/SparcV9.td $(TABLEGEN_FILES) $(TBLGEN)
+ @echo "Running tblgen on SparcV9.td"
+ $(TableGen) -gen-emitter -o $@ $<
clean::
$(VERB) $(RM) -f SparcV9CodeEmitter.inc SparcV9.burg.in1 SparcV9.burm SparcV9.burm.cpp
diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile
index dd745402fe..bdaf28c5e8 100644
--- a/lib/Target/X86/Makefile
+++ b/lib/Target/X86/Makefile
@@ -8,50 +8,12 @@
##===----------------------------------------------------------------------===##
LEVEL = ../../..
LIBRARYNAME = x86
-include $(LEVEL)/Makefile.common
-
TARGET = X86
-
# Make sure that tblgen is run, first thing.
-$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
- X86GenRegisterInfo.inc X86GenInstrNames.inc \
- X86GenInstrInfo.inc X86GenATTAsmWriter.inc \
- X86GenIntelAsmWriter.inc
-
-TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
- $(SourceDir)/../Target.td
-
-$(TARGET)GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
-
-$(TARGET)GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register information header with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
+BUILT_SOURCES = X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
+ X86GenRegisterInfo.inc X86GenInstrNames.inc \
+ X86GenInstrInfo.inc X86GenATTAsmWriter.inc \
+ X86GenIntelAsmWriter.inc
-$(TARGET)GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td register info implementation with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
-
-$(TARGET)GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction names with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
-
-$(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td instruction information with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
-
-$(TARGET)GenATTAsmWriter.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td AT&T assembly writer with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -o $@
-
-$(TARGET)GenIntelAsmWriter.inc:: $(TDFILES) $(TBLGEN)
- @echo "Building $(TARGET).td Intel assembly writer with tblgen"
- $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -asmwriternum=1 -o $@
-
-#$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN)
-# @echo "Building $(TARGET).td instruction selector with tblgen"
-# $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+include $(LEVEL)/Makefile.common
-clean::
- $(VERB) rm -f *.inc
diff --git a/projects/Makefile b/projects/Makefile
index 1e89f6d91b..ddb9323ba5 100644
--- a/projects/Makefile
+++ b/projects/Makefile
@@ -10,7 +10,7 @@ LEVEL=..
include $(LEVEL)/Makefile.config
-DIRS:= $(filter-out llvm-test,$(patsubst $(SourceDir)/%/Makefile,%,$(wildcard $(SourceDir)/*/Makefile)))
+DIRS:= $(filter-out llvm-test,$(patsubst $(BUILD_SRC_DIR)/%/Makefile,%,$(wildcard $(BUILD_SRC_DIR)/*/Makefile)))
# Sparc cannot link shared libraries (libtool problem?) which Stacker uses
ifeq ($(ARCH), Sparc)
diff --git a/projects/Stacker/lib/compiler/Makefile b/projects/Stacker/lib/compiler/Makefile
index 67c9e13ff2..1b767058a0 100644
--- a/projects/Stacker/lib/compiler/Makefile
+++ b/projects/Stacker/lib/compiler/Makefile
@@ -18,3 +18,5 @@ include $(LEVEL)/Makefile.common
ifdef PARSE_DEBUG
INCLUDES += -DPARSE_DEBUG
endif
+
+$(OBJDIR)/Lexer.o : StackerParser.h
diff --git a/projects/sample/tools/sample/Makefile b/projects/sample/tools/sample/Makefile
index 17ea11ac79..1127f75575 100644
--- a/projects/sample/tools/sample/Makefile
+++ b/projects/sample/tools/sample/Makefile
@@ -14,7 +14,7 @@ TOOLNAME=sample
# List libraries that we'll need
# We use LIBS because sample is a dynamic library.
#
-LIBS+=-lsample
+USEDLIBS = sample
#
# Include Makefile.common so we know what to do.
diff --git a/runtime/GC/SemiSpace/Makefile b/runtime/GC/SemiSpace/Makefile
index 2b5af6ef34..53526aab98 100644
--- a/runtime/GC/SemiSpace/Makefile
+++ b/runtime/GC/SemiSpace/Makefile
@@ -9,11 +9,9 @@
LEVEL = ../../..
BYTECODE_LIBRARY=1
-#SHARED_LIBRARY=1
-#DONT_BUILD_RELINKED=1
LIBRARYNAME=gcsemispace
-EXPORTED_SYMBOL_FILE = $(SourceDir)/../gc_exported_symbols.lst
+EXPORTED_SYMBOL_FILE = $(BUILD_SRC_DIR)/../gc_exported_symbols.lst
include $(LEVEL)/Makefile.common
diff --git a/runtime/GCCLibraries/crtend/Makefile b/runtime/GCCLibraries/crtend/Makefile
index 829563b58d..a3b9a711bd 100644
--- a/runtime/GCCLibraries/crtend/Makefile
+++ b/runtime/GCCLibraries/crtend/Makefile
@@ -21,18 +21,17 @@ DONT_BUILD_RELINKED=1
MainSrc := crtend.c listend.ll
GenericEHSrc := Exception.cpp
SJLJEHSrc := SJLJ-Exception.cpp
-CXXEHSrc := C++-Exception.cpp
Source := $(MainSrc) $(GenericEHSrc) $(SJLJEHSrc) $(CXXEHSrc)
include $(LEVEL)/Makefile.common
# CRTEND_A - The result of making 'all' - the final archive file.
-CRTEND_A = $(DESTLIBBYTECODE)/libcrtend.a
+CRTEND_A = $(LIBDIR)/libcrtend.a
all:: $(CRTEND_A)
# Installation simply requires copying the archive to it's new home.
-$(DESTDIR)$(bytecode_libdir)/libcrtend.a: $(CRTEND_A) $(DESTDIR)$(bytecode_libdir)
- cp $< $@
+$(DESTDIR)$(bytecode_libdir)/libcrtend.a: $(CRTEND_A)
+ $(INSTALL) $(CRTEND_A) $(DESTDIR)$(bytecode_libdir)
install:: $(DESTDIR)$(bytecode_libdir)/libcrtend.a
install-bytecode:: $(DESTDIR)$(bytecode_libdir)/libcrtend.a
@@ -40,33 +39,31 @@ install-bytecode:: $(DESTDIR)$(bytecode_libdir)/libcrtend.a
# The four components described in the README
Components := main genericeh sjljeh
-ComponentLibs := $(Components:%=$(BUILD_OBJ_DIR)/BytecodeObj/comp_%.bc)
+ComponentLibs := $(Components:%=$(OBJDIR)/comp_%.bc)
# We build libcrtend.a from the four components described in the README.
-$(CRTEND_A) : $(ComponentLibs) $(DESTLIBBYTECODE)/.dir
+$(CRTEND_A) : $(ComponentLibs) $(LIBDIR)/.dir
@echo Building final libcrtend.a file from components
- $(VERB) $(AR) $@ $(ComponentLibs)
+ $(VERB) $(Archive) $@ $(ComponentLibs)
-MainObj := $(BUILD_OBJ_DIR)/BytecodeObj/crtend.bc \
- $(BUILD_OBJ_DIR)/BytecodeObj/listend.bc
-GenericEHObj := $(BUILD_OBJ_DIR)/BytecodeObj/Exception.bc
-SJLJEHObj := $(BUILD_OBJ_DIR)/BytecodeObj/SJLJ-Exception.bc
-CXXEHObj := $(BUILD_OBJ_DIR)/BytecodeObj/C++-Exception.bc
+MainObj := $(OBJDIR)/crtend.bc $(OBJDIR)/listend.bc
+GenericEHObj := $(OBJDIR)/Exception.bc
+SJLJEHObj := $(OBJDIR)/SJLJ-Exception.bc
# __main and ctor/dtor support component
-$(BUILD_OBJ_DIR)/BytecodeObj/comp_main.bc: $(MainObj)
+$(OBJDIR)/comp_main.bc: $(MainObj)
@echo Linking $(notdir $@) component...
- $(VERB) $(LGCCLDPROG) -link-as-library -internalize-public-api-file=$(BUILD_SRC_DIR)/comp_main.lst $(MainObj) -o $@
+ $(VERB) $(GCCLD) -link-as-library -internalize-public-api-file=$(BUILD_SRC_DIR)/comp_main.lst $(MainObj) -o $@
# Generic exception handling support runtime.
-$(BUILD_OBJ_DIR)/BytecodeObj/comp_genericeh.bc: $(GenericEHObj)
+$(OBJDIR)/comp_genericeh.bc: $(GenericEHObj)
@echo Linking $(notdir $@) component...
- $(VERB) $(LGCCLDPROG) -link-as-library -internalize-public-api-file=$(BUILD_SRC_DIR)/comp_genericeh.lst $(GenericEHObj) -o $@
+ $(VERB) $(GCCLD) -link-as-library -internalize-public-api-file=$(BUILD_SRC_DIR)/comp_genericeh.lst $(GenericEHObj) -o $@
# setjmp/longjmp exception handling support runtime.
-$(BUILD_OBJ_DIR)/BytecodeObj/comp_sjljeh.bc: $(SJLJEHObj)
+$(OBJDIR)/comp_sjljeh.bc: $(SJLJEHObj)
@echo Linking $(notdir $@) component...
- $(VERB) $(LGCCLDPROG) -link-as-library -internalize-public-api-file=$(BUILD_SRC_DIR)/comp_sjljeh.lst $(SJLJEHObj) -o $@
+ $(VERB) $(GCCLD) -link-as-library -internalize-public-api-file=$(BUILD_SRC_DIR)/comp_sjljeh.lst $(SJLJEHObj) -o $@
diff --git a/runtime/GCCLibraries/libc/Makefile b/runtime/GCCLibraries/libc/Makefile
index 9e6874bf9c..297d420908 100644
--- a/runtime/GCCLibraries/libc/Makefile
+++ b/runtime/GCCLibraries/libc/Makefile
@@ -6,6 +6,7 @@
# the University of Illinois Open Source License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
+
LEVEL = ../../..
BYTECODE_LIBRARY=1
DONT_BUILD_RELINKED=1
diff --git a/utils/Burg/Makefile b/utils/Burg/Makefile
index ae0a43ce7c..e2236da9c4 100644
--- a/utils/Burg/Makefile
+++ b/utils/Burg/Makefile
@@ -8,7 +8,7 @@
##===----------------------------------------------------------------------===##
LEVEL = ../..
TOOLNAME = burg
-ExtraSource = gram.tab.c
+BUILT_SOURCES = gram.tab.c
include $(LEVEL)/Makefile.common