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authorChris Lattner <sabre@nondot.org>2002-12-18 01:44:31 +0000
committerChris Lattner <sabre@nondot.org>2002-12-18 01:44:31 +0000
commit89fab07abda4092d83e9e5ec40885624a8dc7033 (patch)
tree3abc0f04ba5ba1069df745fc3e367c7280b6772e
parentaed967cc9ebeaa02220d0652954dcf71dce842f2 (diff)
Don't force setCC instructions into AL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5104 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/InstSelectSimple.cpp5
-rw-r--r--lib/Target/X86/X86ISelSimple.cpp5
2 files changed, 2 insertions, 8 deletions
diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index 4cae283f7b..e9492ae3b8 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -437,10 +437,7 @@ void ISel::visitSetCCInst(SetCondInst &I, unsigned OpNum) {
{X86::SETEr, X86::SETNEr, X86::SETLr, X86::SETGr, X86::SETLEr, X86::SETGEr},
};
- BuildMI(BB, OpcodeTab[CompTy->isSigned()][OpNum], 0, X86::AL);
-
- // Put it in the result using a move.
- BuildMI (BB, X86::MOVrr8, 1, getReg(I)).addReg(X86::AL);
+ BuildMI(BB, OpcodeTab[CompTy->isSigned()][OpNum], 0, getReg(I));
}
/// promote32 - Emit instructions to turn a narrow operand into a 32-bit-wide
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 4cae283f7b..e9492ae3b8 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -437,10 +437,7 @@ void ISel::visitSetCCInst(SetCondInst &I, unsigned OpNum) {
{X86::SETEr, X86::SETNEr, X86::SETLr, X86::SETGr, X86::SETLEr, X86::SETGEr},
};
- BuildMI(BB, OpcodeTab[CompTy->isSigned()][OpNum], 0, X86::AL);
-
- // Put it in the result using a move.
- BuildMI (BB, X86::MOVrr8, 1, getReg(I)).addReg(X86::AL);
+ BuildMI(BB, OpcodeTab[CompTy->isSigned()][OpNum], 0, getReg(I));
}
/// promote32 - Emit instructions to turn a narrow operand into a 32-bit-wide