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authorEli Friedman <eli.friedman@gmail.com>2011-09-01 21:21:24 +0000
committerEli Friedman <eli.friedman@gmail.com>2011-09-01 21:21:24 +0000
commit86b5db8c011d96e7b7af0299cc99c942b790499e (patch)
tree19dc496e4310a1bc0af04cd502942a3ba881e761
parent89e0f4b5b07aad3b690efa426b8f4131043aec40 (diff)
Fix an issue with the IR sink pass found by inspection. (I'm not sure anyone is actually using this, but might as well fix it since I found the issue.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138965 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/Sink.cpp13
-rw-r--r--test/Transforms/Sink/basic.ll16
2 files changed, 22 insertions, 7 deletions
diff --git a/lib/Transforms/Scalar/Sink.cpp b/lib/Transforms/Scalar/Sink.cpp
index 705f442049..c83f56c4d2 100644
--- a/lib/Transforms/Scalar/Sink.cpp
+++ b/lib/Transforms/Scalar/Sink.cpp
@@ -153,9 +153,13 @@ bool Sinking::ProcessBlock(BasicBlock &BB) {
static bool isSafeToMove(Instruction *Inst, AliasAnalysis *AA,
SmallPtrSet<Instruction *, 8> &Stores) {
- if (LoadInst *L = dyn_cast<LoadInst>(Inst)) {
- if (L->isVolatile()) return false;
+ if (Inst->mayWriteToMemory()) {
+ Stores.insert(Inst);
+ return false;
+ }
+
+ if (LoadInst *L = dyn_cast<LoadInst>(Inst)) {
AliasAnalysis::Location Loc = AA->getLocation(L);
for (SmallPtrSet<Instruction *, 8>::iterator I = Stores.begin(),
E = Stores.end(); I != E; ++I)
@@ -163,11 +167,6 @@ static bool isSafeToMove(Instruction *Inst, AliasAnalysis *AA,
return false;
}
- if (Inst->mayWriteToMemory()) {
- Stores.insert(Inst);
- return false;
- }
-
if (isa<TerminatorInst>(Inst) || isa<PHINode>(Inst))
return false;
diff --git a/test/Transforms/Sink/basic.ll b/test/Transforms/Sink/basic.ll
index 54b7f1369d..81782e9d42 100644
--- a/test/Transforms/Sink/basic.ll
+++ b/test/Transforms/Sink/basic.ll
@@ -20,3 +20,19 @@ true:
false:
ret i32 0
}
+
+; But don't sink volatile loads...
+
+; CHECK: @foo2
+; CHECK: volatile load
+; CHECK-NEXT: store i32
+
+define i32 @foo2(i1 %z) {
+ %l = volatile load i32* @A
+ store i32 0, i32* @B
+ br i1 %z, label %true, label %false
+true:
+ ret i32 %l
+false:
+ ret i32 0
+}