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author | Dan Gohman <gohman@apple.com> | 2008-08-07 02:23:06 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-08-07 02:23:06 +0000 |
commit | 865db4566e84b788e5738fec462804a779223b8b (patch) | |
tree | 1ddf2a8e23e912ff0e0831e2fd5850ce910ff656 | |
parent | dd947ea3c5e020c33c58a31939561265b980a3ad (diff) |
Add an extra example that shouldn't get an and instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54443 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | test/CodeGen/X86/zext-inreg-1.ll | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/test/CodeGen/X86/zext-inreg-1.ll b/test/CodeGen/X86/zext-inreg-1.ll index 6a678b2e3b..bc8e482d56 100644 --- a/test/CodeGen/X86/zext-inreg-1.ll +++ b/test/CodeGen/X86/zext-inreg-1.ll @@ -6,7 +6,12 @@ ; These should use movzbl instead of 'and 255'. ; This related to not having ZERO_EXTEND_REG node. -define i64 @h(i64 %d) nounwind { +define i64 @l(i64 %d) nounwind { + %e = add i64 %d, 1 + %retval = and i64 %e, 1099511627775 + ret i64 %retval +} +define i64 @m(i64 %d) nounwind { %e = add i64 %d, 1 %retval = and i64 %e, 281474976710655 ret i64 %retval |