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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2011-05-27 16:01:08 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2011-05-27 16:01:08 +0000 |
| commit | 81a2745830120b45c7e719b5e184418db558b4a6 (patch) | |
| tree | 61e7a2dd95c8ef23f4708dac663e7d8e5a87af8a | |
| parent | 07cbe231738d64d830b77303d664b531130722f7 (diff) | |
Remove DwarfRegNum from CARRY. I should be encoded with DW_OP_bit_piece.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132190 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/MBlaze/MBlazeRegisterInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/MBlaze/MBlazeRegisterInfo.td b/lib/Target/MBlaze/MBlazeRegisterInfo.td index caca407411..4fb4d342ab 100644 --- a/lib/Target/MBlaze/MBlazeRegisterInfo.td +++ b/lib/Target/MBlaze/MBlazeRegisterInfo.td @@ -102,7 +102,7 @@ let Namespace = "MBlaze" in { // The carry bit. In the Microblaze this is really bit 29 of the // MSR register but this is the only bit of that register that we // are interested in modeling. - def CARRY : MBlazeSPRReg<0x0000, "rmsr[c]">, DwarfRegNum<[33]>; + def CARRY : MBlazeSPRReg<0x0000, "rmsr[c]">; } //===----------------------------------------------------------------------===// |