diff options
| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-18 08:33:18 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-01-18 08:33:18 +0000 |
| commit | 819026f2f8b13ac7f6051727fce54b95868c3d85 (patch) | |
| tree | 6c5a45881ac41724bc8268306781eae82f937ff2 | |
| parent | cd7f02bb43ec07e0a2bd6d90177b353c94408586 (diff) | |
Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148383 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/2012-01-18-vbitcast.ll | 14 |
2 files changed, 18 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index 5c56e474b3..ee5e1a1154 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -249,8 +249,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) { return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); } case TargetLowering::TypeWidenVector: - if (NOutVT.bitsEq(NInVT)) - // The input is widened to the same size. Convert to the widened value. + // The input is widened to the same size. Convert to the widened value. + // Make sure that the outgoing value is not a vector, because this would + // make us bitcast between two vectors which are legalized in different ways. + if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector()) return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); } diff --git a/test/CodeGen/X86/2012-01-18-vbitcast.ll b/test/CodeGen/X86/2012-01-18-vbitcast.ll new file mode 100644 index 0000000000..8a3ccc8dfd --- /dev/null +++ b/test/CodeGen/X86/2012-01-18-vbitcast.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s + +;CHECK: vcast +define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) { +;CHECK: pshufd +;CHECK: pshufd + %af = bitcast <2 x float> %a to <2 x i32> + %bf = bitcast <2 x float> %b to <2 x i32> + %x = sub <2 x i32> %af, %bf +;CHECK: psubq + ret <2 x i32> %x +;CHECK: ret +} + |