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authorChris Lattner <sabre@nondot.org>2008-06-30 02:43:01 +0000
committerChris Lattner <sabre@nondot.org>2008-06-30 02:43:01 +0000
commit80c1a5622a26794873b0d44e27c04926cd6c6be1 (patch)
tree52956d3f0d818913c234040b1ea339713684cf70
parent69c8d9be02ddf696f0c4153193d973c82a2e2835 (diff)
Implement split and scalarize for SELECT_CC, fixing PR2504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52887 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp23
-rw-r--r--test/CodeGen/Generic/select-cc.ll9
2 files changed, 32 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index f087496996..c40a783da0 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -6895,6 +6895,22 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
}
break;
}
+ case ISD::SELECT_CC: {
+ SDOperand CondLHS = Node->getOperand(0);
+ SDOperand CondRHS = Node->getOperand(1);
+ SDOperand CondCode = Node->getOperand(4);
+
+ SDOperand LL, LH, RL, RH;
+ SplitVectorOp(Node->getOperand(2), LL, LH);
+ SplitVectorOp(Node->getOperand(3), RL, RH);
+
+ // Handle a simple select with vector operands.
+ Lo = DAG.getNode(ISD::SELECT_CC, NewVT_Lo, CondLHS, CondRHS,
+ LL, RL, CondCode);
+ Hi = DAG.getNode(ISD::SELECT_CC, NewVT_Hi, CondLHS, CondRHS,
+ LH, RH, CondCode);
+ break;
+ }
case ISD::VSETCC: {
SDOperand LL, LH, RL, RH;
SplitVectorOp(Node->getOperand(0), LL, LH);
@@ -7122,6 +7138,13 @@ SDOperand SelectionDAGLegalize::ScalarizeVectorOp(SDOperand Op) {
ScalarizeVectorOp(Op.getOperand(1)),
ScalarizeVectorOp(Op.getOperand(2)));
break;
+ case ISD::SELECT_CC:
+ Result = DAG.getNode(ISD::SELECT_CC, NewVT, Node->getOperand(0),
+ Node->getOperand(1),
+ ScalarizeVectorOp(Op.getOperand(2)),
+ ScalarizeVectorOp(Op.getOperand(3)),
+ Node->getOperand(4));
+ break;
case ISD::VSETCC: {
SDOperand Op0 = ScalarizeVectorOp(Op.getOperand(0));
SDOperand Op1 = ScalarizeVectorOp(Op.getOperand(1));
diff --git a/test/CodeGen/Generic/select-cc.ll b/test/CodeGen/Generic/select-cc.ll
new file mode 100644
index 0000000000..85e68d19c4
--- /dev/null
+++ b/test/CodeGen/Generic/select-cc.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc
+; PR2504
+
+define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind {
+ %x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
+ %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
+ %a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x ; <<2 x double>> [#uses=1]
+ ret <2 x double> %a.d
+}