diff options
author | Evan Cheng <evan.cheng@apple.com> | 2010-05-14 00:21:45 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-05-14 00:21:45 +0000 |
commit | 7f687195175f01d820eea70e8a647a61d5b99fce (patch) | |
tree | dab9d4add85270e5d17ced10116ee380187384b8 | |
parent | 57b6076d343e03237ea8b56ab291f488cc97300f (diff) |
Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103749 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 294486c99f..edb6c9cfe8 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -968,7 +968,7 @@ SDNode *ARMDAGToDAGISel::PairDRegs(EVT VT, SDValue V0, SDValue V1) { VT, SDValue(Pair, 0), V1, SubReg1); } -/// PairDRegs - Form a quad register pair from a pair of Q registers. +/// PairQRegs - Form 4 consecutive D registers from a pair of Q registers. /// SDNode *ARMDAGToDAGISel::PairQRegs(EVT VT, SDValue V0, SDValue V1) { DebugLoc dl = V0.getNode()->getDebugLoc(); @@ -978,7 +978,7 @@ SDNode *ARMDAGToDAGISel::PairQRegs(EVT VT, SDValue V0, SDValue V1) { return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 4); } -/// QuadDRegs - Form a octo register from a quad of D registers. +/// QuadDRegs - Form 4 consecutive D registers. /// SDNode *ARMDAGToDAGISel::QuadDRegs(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3) { |