diff options
| author | Daniel Dunbar <daniel@zuster.org> | 2010-05-19 08:07:12 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2010-05-19 08:07:12 +0000 |
| commit | 7d4bd203be35a25e31256eeea4ef7628573ffa54 (patch) | |
| tree | dcae2b354f52be2b54c11b5f8329d691c88295bd | |
| parent | 9085f98b32775aa0190eac221a58350d837ae2c3 (diff) | |
MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and
CALL64pcrel32, for the same reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104116 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/AsmPrinter/X86MCInstLower.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp index c2a42932f5..ec90fd6fe8 100644 --- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp +++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp @@ -364,9 +364,11 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { LowerUnaryToTwoAddr(OutMI, X86::XOR32rr); // MOV32r0 -> XOR32rr break; - // CALL64r, CALL64pcrel32 - These instructions have register inputs modeled as - // normal uses instead of implicit uses. As such, truncate off all but the - // first operand (the callee). FIXME: Change isel. + // TAILJMPr, TAILJMPr64, CALL64r, CALL64pcrel32 - These instructions have + // register inputs modeled as normal uses instead of implicit uses. As such, + // truncate off all but the first operand (the callee). FIXME: Change isel. + case X86::TAILJMPr: + case X86::TAILJMPr64: case X86::CALL64r: case X86::CALL64pcrel32: { unsigned Opcode = OutMI.getOpcode(); |