diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 23:12:12 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-10-11 23:12:12 +0000 |
| commit | 76d9f1c0222e73264037afb739e34317a35a1fb1 (patch) | |
| tree | 47af725ead4683733cdf3526b951ca50472bfae7 | |
| parent | c2f3ac9de2596df2af8b85245b987476a773d4ad (diff) | |
Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141737 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index fe6d2f4ba2..7b34a40c26 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -250,7 +250,7 @@ def truncstorei32_u : UnalignedStore<truncstorei32>; // Instructions specific format //===----------------------------------------------------------------------===// -// Arithmetic 3 register operands +// Arithmetic and logical instructions with 3 register operands. class ArithLogicR<bits<6> op, bits<6> func, string instr_asm, SDNode OpNode, InstrItinClass itin, RegisterClass RC, bit isComm = 0>: FR<op, func, (outs RC:$rd), (ins RC:$rs, RC:$rt), |