diff options
author | Chris Lattner <sabre@nondot.org> | 2009-07-10 05:48:03 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2009-07-10 05:48:03 +0000 |
commit | 754b7650c20a0fa3a9df3f067dc02a0905992325 (patch) | |
tree | b03982bb1ba5257cc1e88bfc10793bea26582452 | |
parent | e6c07b52e76b19d83338901b2e103bd8cbabd42f (diff) |
actually, just eliminate PCRelGVRequiresExtraLoad. It makes the code
more complex and slow than just directly testing what we care about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75231 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 3 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86Subtarget.cpp | 13 | ||||
-rw-r--r-- | lib/Target/X86/X86Subtarget.h | 6 |
4 files changed, 2 insertions, 22 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index bbf773871b..6359a4bef4 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -587,7 +587,7 @@ bool X86FastISel::X86SelectCallAddress(Value *V, X86AddressMode &AM) { (AM.Base.Reg != 0 || AM.IndexReg != 0)) return false; - // Can't handle TLS yet. + // Can't handle TLS or DLLImport. if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) if (GVar->isThreadLocal() || GVar->hasDLLImportLinkage()) return false; @@ -597,7 +597,6 @@ bool X86FastISel::X86SelectCallAddress(Value *V, X86AddressMode &AM) { // No ABI requires an extra load for anything other than DLLImport, which // we rejected above. Return a direct reference to the global. - assert(!Subtarget->PCRelGVRequiresExtraLoad(GV, TM)); if (Subtarget->isPICStyleRIPRel()) { // Use rip-relative addressing if we can. Above we verified that the // base and index registers are unused. diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 5e61548402..40cd608ef9 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1902,7 +1902,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) { // We should use extra load for direct calls to dllimported functions in // non-JIT mode. GlobalValue *GV = G->getGlobal(); - if (!Subtarget->PCRelGVRequiresExtraLoad(GV, getTargetMachine())) { + if (!GV->hasDLLImportLinkage()) { unsigned char OpFlags = 0; // On ELF targets, in both X86-64 and X86-32 mode, direct calls to diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index 6eb0235e15..d966e34de7 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -72,19 +72,6 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue *GV, return false; } -/// PCRelGVRequiresExtraLoad - True if accessing the GV from a PC-relative -/// operand like a call target requires an extra load. -bool X86Subtarget::PCRelGVRequiresExtraLoad(const GlobalValue *GV, - const TargetMachine &TM) const { - // Windows targets only require an extra load for DLLImport linkage values, - // and they need these regardless of whether we're in PIC mode or not. - if (isTargetCygMing() || isTargetWindows()) - return GV->hasDLLImportLinkage(); - - return false; -} - - /// True if accessing the GV requires a register. This is a superset of the /// cases where GVRequiresExtraLoad is true. Some variations of PIC require /// a register, but not an extra load. diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index b2e518ed39..7148d0d8b6 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -204,12 +204,6 @@ public: bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine &TM, bool isDirectCall) const; - /// PCRelGVRequiresExtraLoad - True if accessing the GV from a PC-relative - /// operand like a call target requires an extra load. - bool PCRelGVRequiresExtraLoad(const GlobalValue *GV, - const TargetMachine &TM) const; - - /// True if accessing the GV requires a register. This is a superset of the /// cases where GVRequiresExtraLoad is true. Some variations of PIC require /// a register, but not an extra load. |