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authorAndrew Lenharth <andrewl@lenharth.org>2005-04-02 19:11:07 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-04-02 19:11:07 +0000
commit7332f3e05d37b5bb772bb94e607fa04ef302af0f (patch)
treefd99fb75f245b9b421b09f5e059243d849e5cf2f
parent30b46d41bcdd48a6b731d84761031347132ed95c (diff)
FNEG/FABS/UNDEF
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21029 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/Alpha/AlphaISelPattern.cpp16
1 files changed, 13 insertions, 3 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index a0f3e8e93f..4a40aa93e1 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -537,15 +537,19 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
Node->dump();
assert(0 && "Node not handled!\n");
+ case ISD::UNDEF: {
+ BuildMI(BB, Alpha::IDEF, 0, Result);
+ return Result;
+ }
+
case ISD::FNEG:
if(ISD::FABS == N.getOperand(0).getOpcode())
{
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
- BuildMI(BB, Alpha::CPYSN, 2, Result).addReg(Tmp1).addReg(Tmp1);
+ BuildMI(BB, Alpha::CPYSN, 2, Result).addReg(Alpha::F31).addReg(Tmp1);
} else {
Tmp1 = SelectExpr(N.getOperand(0));
- Opc = DestType == MVT::f64 ? Alpha::SUBT : Alpha::SUBS ;
- BuildMI(BB, Opc, 2, Result).addReg(Alpha::F31).addReg(Tmp1);
+ BuildMI(BB, Alpha::CPYSN, 2, Result).addReg(Tmp1).addReg(Tmp1);
}
return Result;
@@ -850,6 +854,12 @@ unsigned ISel::SelectExpr(SDOperand N) {
Node->dump();
assert(0 && "Node not handled!\n");
+
+ case ISD::UNDEF: {
+ BuildMI(BB, Alpha::IDEF, 0, Result);
+ return Result;
+ }
+
case ISD::DYNAMIC_STACKALLOC:
// Generate both result values.
if (Result != notIn)