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authorHal Finkel <hfinkel@anl.gov>2012-06-08 19:19:53 +0000
committerHal Finkel <hfinkel@anl.gov>2012-06-08 19:19:53 +0000
commit7255d2a8084cb6aa96ea0e5f30acfff76df04ee8 (patch)
tree785085ec68f98e4874be4b08af4b2f8497b7ed82
parent7e5631202ab5b5f2097d234d0357bc5b3b7f5530 (diff)
Enable PPC CTR loop formation by default.
Thanks to Jakob's help, this now causes no new test suite failures! Over the entire test suite, this gives an average 1% speedup. The largest speedups are: SingleSource/Benchmarks/Misc/pi - 108% SingleSource/Benchmarks/CoyoteBench/lpbench - 54% MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail - 50% SingleSource/Benchmarks/Shootout/ary3 - 32% SingleSource/Benchmarks/Shootout-C++/matrix - 30% The largest slowdowns are: MultiSource/Benchmarks/mediabench/gsm/toast/toast - -30% MultiSource/Benchmarks/Prolangs-C/bison/mybison - -25% MultiSource/Benchmarks/BitBench/uuencode/uuencode - -22% MultiSource/Applications/d/make_dparser - -14% SingleSource/Benchmarks/Shootout-C++/ary - -13% In light of these slowdowns, additional profiling work is obviously needed! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158223 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPCInstrInfo.cpp12
-rw-r--r--lib/Target/PowerPC/PPCTargetMachine.cpp8
-rw-r--r--test/CodeGen/PowerPC/ctrloop-reg.ll2
-rw-r--r--test/CodeGen/PowerPC/ctrloops.ll2
4 files changed, 11 insertions, 13 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index 8b868e69ec..28b3bc1596 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -41,8 +41,8 @@ extern cl::opt<bool> DisablePPC64RS;
using namespace llvm;
static cl::
-opt<bool> EnableCTRLoopAnal("enable-ppc-ctrloop-analysis", cl::Hidden,
- cl::desc("Enable analysis for CTR loops (experimental)"));
+opt<bool> DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden,
+ cl::desc("Disable analysis for CTR loops"));
PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
: PPCGenInstrInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP),
@@ -233,7 +233,7 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
LastInst->getOpcode() == PPC::BDNZ) {
if (!LastInst->getOperand(0).isMBB())
return true;
- if (!EnableCTRLoopAnal)
+ if (DisableCTRLoopAnal)
return true;
TBB = LastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(1));
@@ -244,7 +244,7 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
LastInst->getOpcode() == PPC::BDZ) {
if (!LastInst->getOperand(0).isMBB())
return true;
- if (!EnableCTRLoopAnal)
+ if (DisableCTRLoopAnal)
return true;
TBB = LastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(0));
@@ -282,7 +282,7 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
if (!SecondLastInst->getOperand(0).isMBB() ||
!LastInst->getOperand(0).isMBB())
return true;
- if (!EnableCTRLoopAnal)
+ if (DisableCTRLoopAnal)
return true;
TBB = SecondLastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(1));
@@ -296,7 +296,7 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
if (!SecondLastInst->getOperand(0).isMBB() ||
!LastInst->getOperand(0).isMBB())
return true;
- if (!EnableCTRLoopAnal)
+ if (DisableCTRLoopAnal)
return true;
TBB = SecondLastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(0));
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index bcab83c5cf..b9c703e708 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -23,8 +23,8 @@
using namespace llvm;
static cl::
-opt<bool> EnableCTRLoops("enable-ppc-ctrloops", cl::Hidden,
- cl::desc("Enable CTR loops for PPC"));
+opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
+ cl::desc("Disable CTR loops for PPC"));
extern "C" void LLVMInitializePowerPCTarget() {
// Register the targets
@@ -103,9 +103,7 @@ TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
}
bool PPCPassConfig::addPreRegAlloc() {
- // FIXME: Once this can be enabled by default, this condition should read:
- // if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
- if (EnableCTRLoops)
+ if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
PM->add(createPPCCTRLoops());
return false;
diff --git a/test/CodeGen/PowerPC/ctrloop-reg.ll b/test/CodeGen/PowerPC/ctrloop-reg.ll
index 0746f66628..874e5712bb 100644
--- a/test/CodeGen/PowerPC/ctrloop-reg.ll
+++ b/test/CodeGen/PowerPC/ctrloop-reg.ll
@@ -1,7 +1,7 @@
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
-; RUN: llc -enable-ppc-ctrloops < %s -march=ppc64 | FileCheck %s
+; RUN: llc < %s -march=ppc64 | FileCheck %s
%struct.ref_s.1.49.91.115.121.139.145.151.157.163.169.175.181.211 = type { %union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210, i16, i16 }
%union.v.0.48.90.114.120.138.144.150.156.162.168.174.180.210 = type { i64 }
diff --git a/test/CodeGen/PowerPC/ctrloops.ll b/test/CodeGen/PowerPC/ctrloops.ll
index ad55fa4a23..f7bd354ce8 100644
--- a/test/CodeGen/PowerPC/ctrloops.ll
+++ b/test/CodeGen/PowerPC/ctrloops.ll
@@ -1,6 +1,6 @@
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-freebsd10.0"
-; RUN: llc -enable-ppc-ctrloops -enable-ppc-ctrloop-analysis < %s -march=ppc64 | FileCheck %s
+; RUN: llc < %s -march=ppc64 | FileCheck %s
@a = common global i32 0, align 4