diff options
author | Dale Johannesen <dalej@apple.com> | 2008-01-20 01:18:38 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2008-01-20 01:18:38 +0000 |
commit | 713ed3f7c0cb788f74af0697fce3c4eafda4178e (patch) | |
tree | f702d740461f69d90d33883a37edd58243993027 | |
parent | 187784996c1bdf8aafb5f8719bcbde9260465865 (diff) |
Do not generate a FP_ROUND of f64 to f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46195 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 8d7c85ce93..222a23dc2a 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3608,10 +3608,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { MVT::ValueType SrcVT = Op.getOperand(0).getValueType(); if (TLI.getConvertAction(SrcVT, DstVT) == TargetLowering::Expand) { if (SrcVT == MVT::ppcf128) { - SDOperand Lo, Hi; - ExpandOp(Node->getOperand(0), Lo, Hi); + SDOperand Lo; + ExpandOp(Node->getOperand(0), Lo, Result); // Round it the rest of the way (e.g. to f32) if needed. - Result = DAG.getNode(ISD::FP_ROUND, DstVT, Hi, Op.getOperand(1)); + if (DstVT!=MVT::f64) + Result = DAG.getNode(ISD::FP_ROUND, DstVT, Result, Op.getOperand(1)); break; } // The only other way we can lower this is to turn it into a STORE, |