diff options
| author | Jim Grosbach <grosbach@apple.com> | 2012-01-20 19:16:00 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-01-20 19:16:00 +0000 |
| commit | 6d56730ab8a08a3530a029e9b681590d88b00bc0 (patch) | |
| tree | 04bf44d30c39ffe2ab5dbb86cb1080861ebdf8bf | |
| parent | 51222d1551383dd7b95ba356b1a5ed89df69e789 (diff) | |
VST2 four-register w/ update pseudos for fixed/register update.
rdar://10724489
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148560 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 21 | ||||
| -rw-r--r-- | test/CodeGen/ARM/vst2.ll | 9 |
2 files changed, 24 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index d940255378..781d158340 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -1409,6 +1409,15 @@ class VSTQQWBPseudo<InstrItinClass itin> : PseudoNLdSt<(outs GPR:$wb), (ins addrmode6:$addr, am6offset:$offset, QQPR:$src), itin, "$addr.addr = $wb">; +class VSTQQWBfixedPseudo<InstrItinClass itin> + : PseudoNLdSt<(outs GPR:$wb), + (ins addrmode6:$addr, QQPR:$src), itin, + "$addr.addr = $wb">; +class VSTQQWBregisterPseudo<InstrItinClass itin> + : PseudoNLdSt<(outs GPR:$wb), + (ins addrmode6:$addr, rGPR:$offset, QQPR:$src), itin, + "$addr.addr = $wb">; + class VSTQQQQPseudo<InstrItinClass itin> : PseudoNLdSt<(outs), (ins addrmode6:$addr, QQQQPR:$src), itin, "">; class VSTQQQQWBPseudo<InstrItinClass itin> @@ -1680,12 +1689,12 @@ def VST2d8PseudoWB_register : VSTQWBregisterPseudo<IIC_VST2u>; def VST2d16PseudoWB_register : VSTQWBregisterPseudo<IIC_VST2u>; def VST2d32PseudoWB_register : VSTQWBregisterPseudo<IIC_VST2u>; -def VST2q8PseudoWB_fixed : VSTQQWBPseudo<IIC_VST2x2u>; -def VST2q16PseudoWB_fixed : VSTQQWBPseudo<IIC_VST2x2u>; -def VST2q32PseudoWB_fixed : VSTQQWBPseudo<IIC_VST2x2u>; -def VST2q8PseudoWB_register : VSTQQWBPseudo<IIC_VST2x2u>; -def VST2q16PseudoWB_register : VSTQQWBPseudo<IIC_VST2x2u>; -def VST2q32PseudoWB_register : VSTQQWBPseudo<IIC_VST2x2u>; +def VST2q8PseudoWB_fixed : VSTQQWBfixedPseudo<IIC_VST2x2u>; +def VST2q16PseudoWB_fixed : VSTQQWBfixedPseudo<IIC_VST2x2u>; +def VST2q32PseudoWB_fixed : VSTQQWBfixedPseudo<IIC_VST2x2u>; +def VST2q8PseudoWB_register : VSTQQWBregisterPseudo<IIC_VST2x2u>; +def VST2q16PseudoWB_register : VSTQQWBregisterPseudo<IIC_VST2x2u>; +def VST2q32PseudoWB_register : VSTQQWBregisterPseudo<IIC_VST2x2u>; // ...with double-spaced registers def VST2b8 : VST2<0b1001, {0,0,?,?}, "8", VecListTwoQ, IIC_VST2>; diff --git a/test/CodeGen/ARM/vst2.ll b/test/CodeGen/ARM/vst2.ll index 497214316a..fb05a20f66 100644 --- a/test/CodeGen/ARM/vst2.ll +++ b/test/CodeGen/ARM/vst2.ll @@ -119,6 +119,15 @@ define i8* @vst2update(i8* %out, <4 x i16>* %B) nounwind { ret i8* %t5 } +define i8* @vst2update2(i8 * %out, <4 x float> * %this) nounwind optsize ssp align 2 { +;CHECK: vst2update2 +;CHECK: vst2.32 {d16, d17, d18, d19}, [r0]! + %tmp1 = load <4 x float>* %this + call void @llvm.arm.neon.vst2.v4f32(i8* %out, <4 x float> %tmp1, <4 x float> %tmp1, i32 4) nounwind + %tmp2 = getelementptr inbounds i8* %out, i32 32 + ret i8* %tmp2 +} + declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind declare void @llvm.arm.neon.vst2.v4i16(i8*, <4 x i16>, <4 x i16>, i32) nounwind declare void @llvm.arm.neon.vst2.v2i32(i8*, <2 x i32>, <2 x i32>, i32) nounwind |