diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-04-06 20:59:35 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-04-06 20:59:35 +0000 |
| commit | 6d027f2e6fb2d25603eeaccfca71d5d576367a6d (patch) | |
| tree | 23304cf671b76feac734bc9d99e1f1be6747872c | |
| parent | 3a46221d0b09992d55850a51dc9f50f68f5be6cd (diff) | |
Fix SingleSource/Regression/C/2005-05-06-LongLongSignedShift.c, we were not
properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21120 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelSimple.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index b39396854d..48546aa54f 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -3074,7 +3074,11 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB, } else { BuildMI(*MBB, IP, isSigned ? X86::SAR32ri : X86::SHR32ri, 2, DestReg).addReg(SrcReg+1).addImm(Amount); - BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0); + if (isSigned) + BuildMI(*MBB, IP, X86::SAR32ri, 2, + DestReg+1).addReg(SrcReg+1).addImm(31); + else + BuildMI(*MBB, IP, X86::MOV32ri, 1, DestReg+1).addImm(0); } } } else { |