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authorChris Lattner <sabre@nondot.org>2006-03-16 23:05:19 +0000
committerChris Lattner <sabre@nondot.org>2006-03-16 23:05:19 +0000
commit6cb7004c3499f07c034a01f6335b5058aa80a5ce (patch)
tree93abc736888cae57c54a548f0254d21bbc36114c
parent2771d21c50e93c04d4b1e03a0d998a7ca5b45015 (diff)
Fix a problem fully scalarizing values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26811 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 2f760f6569..0e2b7c183c 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -293,7 +293,10 @@ unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) {
NumElts >>= 1;
NumVectorRegs <<= 1;
}
- VT = getVectorType(EltTy, NumElts);
+ if (NumElts == 1)
+ VT = EltTy;
+ else
+ VT = getVectorType(EltTy, NumElts);
}
// The common case is that we will only create one register for this