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authorAnton Korobeynikov <asl@math.spbu.ru>2007-05-02 22:15:48 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2007-05-02 22:15:48 +0000
commit6ad8256d769f352103b6101c7090e4bfc0389330 (patch)
tree24ede03bba9c560338f7994c0f0fca55f85ec5dd
parent4b693b01fb323d373111de43261676ec0905acd7 (diff)
Properly set arguments bitwidth of EHSELECT node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36654 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 3f6a10ae44..8bd6c97e32 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2632,7 +2632,7 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
if (Reg) CurMBB->addLiveIn(Reg);
// Insert the EHSELECTION instruction.
- SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other);
+ SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
SDOperand Ops[2];
Ops[0] = getValue(I.getOperand(1));
Ops[1] = getRoot();
@@ -2640,7 +2640,7 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
setValue(&I, Op);
DAG.setRoot(Op.getValue(1));
} else {
- setValue(&I, DAG.getConstant(0, MVT::i32));
+ setValue(&I, DAG.getConstant(0, TLI.getPointerTy()));
}
return 0;