diff options
author | Chris Lattner <sabre@nondot.org> | 2010-03-01 22:49:06 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-03-01 22:49:06 +0000 |
commit | 67ea6a711179441ffbc5ac34d14978fc3f546b99 (patch) | |
tree | e03ede1338527d131e8fdf614bc0bca032d1d9ca | |
parent | 01bcd947bfd1830a9d301236a404138c9c97cd7e (diff) |
resolve some fixmes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97515 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | utils/TableGen/DAGISelMatcherGen.cpp | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/utils/TableGen/DAGISelMatcherGen.cpp b/utils/TableGen/DAGISelMatcherGen.cpp index 260d4df588..c0f04deb55 100644 --- a/utils/TableGen/DAGISelMatcherGen.cpp +++ b/utils/TableGen/DAGISelMatcherGen.cpp @@ -36,12 +36,9 @@ static MVT::SimpleValueType getRegisterValueType(Record *R, VT = RC.getValueTypeNum(0); continue; } - - // In multiple RC's. If the Types of the RC's do not agree, return - // MVT::Other. The target is responsible for handling this. - if (VT != RC.getValueTypeNum(0)) - // FIXME2: when does this happen? Abort? - return MVT::Other; + + // If this occurs in multiple register classes, they all have to agree. + assert(VT == RC.getValueTypeNum(0)); } return VT; } @@ -849,10 +846,6 @@ void MatcherGen::EmitResultCode() { AddMatcher(new MarkFlagResultsMatcher(MatchedFlagResultNodes.data(), MatchedFlagResultNodes.size())); - - // We know that the resulting pattern has exactly one result/ - // FIXME2: why? what about something like (set a,b,c, (complexpat)) - // FIXME2: Implicit results should be pushed here I guess? AddMatcher(new CompleteMatchMatcher(Ops.data(), Ops.size(), Pattern)); } |