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authorChris Lattner <sabre@nondot.org>2010-02-21 20:53:45 +0000
committerChris Lattner <sabre@nondot.org>2010-02-21 20:53:45 +0000
commit664012bb64c5430dbe5b194a8ccc5fe50cf49638 (patch)
treeafaaf4f0ea4693f77341f53d01cbbcbf563bf480
parent728ea19ece48ad848238bb940c2725c4de52933e (diff)
Always emit register class id references as i32 like
DAGISelEmitter does. This fixes 11 arm failures (8 left). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96757 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--utils/TableGen/DAGISelMatcherGen.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/utils/TableGen/DAGISelMatcherGen.cpp b/utils/TableGen/DAGISelMatcherGen.cpp
index b22fa875e0..88a4a684f0 100644
--- a/utils/TableGen/DAGISelMatcherGen.cpp
+++ b/utils/TableGen/DAGISelMatcherGen.cpp
@@ -535,7 +535,7 @@ void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
// in COPY_TO_SUBREG instructions.
if (DI->getDef()->isSubClassOf("RegisterClass")) {
std::string Value = getQualifiedName(DI->getDef()) + "RegClassID";
- AddMatcherNode(new EmitStringIntegerMatcherNode(Value, N->getTypeNum(0)));
+ AddMatcherNode(new EmitStringIntegerMatcherNode(Value, MVT::i32));
ResultOps.push_back(NextRecordedOperandNo++);
return;
}