diff options
| author | Chris Lattner <sabre@nondot.org> | 2004-11-23 05:54:25 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-11-23 05:54:25 +0000 |
| commit | 6540c6c344ec09fc2a3e9ffe3424a0a09c225e05 (patch) | |
| tree | 98d2c52cabda37db4ada2d59c9b849e46021e203 | |
| parent | e9cf6b9278bff1eb8899820c50fbe28619ce6bda (diff) | |
LA is really addi. Be consistent with operand ordering to avoid confusing the code emitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18138 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPC32ISelSimple.cpp | 10 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 2 |
2 files changed, 7 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index 83ace16393..b8546338e8 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -698,14 +698,16 @@ void PPC32ISel::copyConstantToRegister(MachineBasicBlock *MBB, unsigned GlobalBase = makeAnotherReg(Type::IntTy); unsigned TmpReg = makeAnotherReg(GV->getType()); - unsigned Opcode = (GV->hasWeakLinkage() - || GV->isExternal() - || dyn_cast<Function>(GV)) ? PPC::LWZ : PPC::LA; // Move value at base + distance into return reg BuildMI(*MBB, IP, PPC::LOADHiAddr, 2, TmpReg) .addReg(getGlobalBaseReg(MBB, IP)).addGlobalAddress(GV); - BuildMI(*MBB, IP, Opcode, 2, R).addGlobalAddress(GV).addReg(TmpReg); + + if (GV->hasWeakLinkage() || GV->isExternal() || dyn_cast<Function>(GV)) { + BuildMI(*MBB, IP, PPC::LWZ, 2, R).addGlobalAddress(GV).addReg(TmpReg); + } else { + BuildMI(*MBB, IP, PPC::LA, 2, R).addReg(TmpReg).addGlobalAddress(GV); + } // Add the GV to the list of things whose addresses have been taken. TM.AddressTaken.insert(GV); diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 4c6b5dc730..cfd3ad4097 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -113,7 +113,7 @@ def ADDICo : DForm_2<13, 0, 0, (ops GPRC:$rD, GPRC:$rA, s16imm:$imm), "addic. $rD, $rA, $imm">; def ADDIS : DForm_2<15, 0, 0, (ops GPRC:$rD, GPRC:$rA, s16imm:$imm), "addis $rD, $rA, $imm">; -def LA : DForm_2<14, 0, 0, (ops GPRC:$rD, symbolLo:$sym, GPRC:$rA), +def LA : DForm_2<14, 0, 0, (ops GPRC:$rD, GPRC:$rA, symbolLo:$sym), "la $rD, $sym($rA)">; def LOADHiAddr : DForm_2<15, 0, 0, (ops GPRC:$rD, GPRC:$rA, symbolHi:$sym), "addis $rD, $rA, $sym">; |