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| author | Devang Patel <dpatel@apple.com> | 2008-03-04 22:05:14 +0000 |
|---|---|---|
| committer | Devang Patel <dpatel@apple.com> | 2008-03-04 22:05:14 +0000 |
| commit | 6494768ffcdf75e6e69a7955282db9ab9ab2e6fb (patch) | |
| tree | 21afefeb190d5d6ad03bd490bbbf6abfc82d068d | |
| parent | ac3746f20c3048eb3c302fec9ae86d7c1ee61c72 (diff) | |
Print types for all ret operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47911 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/VMCore/AsmWriter.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp index 595f478c72..64119eddc8 100644 --- a/lib/VMCore/AsmWriter.cpp +++ b/lib/VMCore/AsmWriter.cpp @@ -1417,7 +1417,8 @@ void AssemblyWriter::printInstruction(const Instruction &I) { const Type *TheType = Operand->getType(); // Select, Store and ShuffleVector always print all types. - if (isa<SelectInst>(I) || isa<StoreInst>(I) || isa<ShuffleVectorInst>(I)) { + if (isa<SelectInst>(I) || isa<StoreInst>(I) || isa<ShuffleVectorInst>(I) + || isa<ReturnInst>(I)) { PrintAllTypes = true; } else { for (unsigned i = 1, E = I.getNumOperands(); i != E; ++i) { |