diff options
| author | Bill Wendling <isanbard@gmail.com> | 2010-11-30 00:34:08 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2010-11-30 00:34:08 +0000 |
| commit | 647fea57fd56b7c0e24f98e01f2a70fd265cc461 (patch) | |
| tree | f88f49c57ff431b097589e0423fd74e071b7d42a | |
| parent | 201d1e56bb7535802c70d5eb46601afcc325045d (diff) | |
Add correct encoding for "bl __aeabi_read_tp". However, the asm matcher isn't
able to match this yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120369 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 0fac0daa0e..3fd4d8000f 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -1265,11 +1265,13 @@ def tLEApcrelJT : T1I<(outs tGPR:$Rd), // // __aeabi_read_tp preserves the registers r1-r3. -let isCall = 1, - Defs = [R0, LR], Uses = [SP] in { +let isCall = 1, Defs = [R0, LR], Uses = [SP] in { def tTPsoft : TIx2<0b11110, 0b11, 1, (outs), (ins), IIC_Br, "bl\t__aeabi_read_tp", - [(set R0, ARMthread_pointer)]>; + [(set R0, ARMthread_pointer)]> { + // Encoding is 0xf7fffffe. + let Inst = 0xf7fffffe; + } } // SJLJ Exception handling intrinsics |